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UPD75517GFA 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD75517GFA
NEC
NEC => Renesas Technology NEC
UPD75517GFA Datasheet PDF : 180 Pages
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µPD75517(A)
Fig. 1-1 Pin Input/Output Circuits (2/3)
Type E - C
P.U.R.
enable
Data
Output
disable
Type F
Data
Output
disable
Type F - B
Type D
VDD
P.U.R.
P-ch
IN/OUT
Type A
P.U.R.: Pull-Up Resistor
Output
disable
(P-ch)
Data
Output
disable
Output
disable
(N-ch)
Type F - C
Type D
IN/OUT
Type B
P.U.R.
enable
Data
Output
disable
P.U.R.
enable
VDD
P.U.R.
P-ch
VDD
P-ch
IN/OUT
N-ch
Type B
P.U.R.: Pull-Up Resistor
VDD
P.U.R.
P-ch
Type D
IN/OUT
I/O circuit consisting of a push-pull output of type D
and a Schmitt-triggered input of type B
Type F - A
P.U.R.
enable
VDD
P.U.R.
P-ch
Data
Output
disable
Type D
IN/OUT
Type M
Data
Output
disable
Type B
P.U.R.: Pull-Up Resistor
VDD
P.U.R.
(Mask option)
IN/OUT
N-ch
(Can sustain
+9 V)
Type B
P.U.R.: Pull-Up Resistor
Middle-voltage input buffer
(Can sustain + 10 V)
P.U.R.: Pull-Up Resistor
11

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