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UPD7554AA 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD7554AA
NEC
NEC => Renesas Technology NEC
UPD7554AA Datasheet PDF : 64 Pages
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µPD7554A, 7554A(A)
1.4 CAUTION ON USE OF P00/INT0 PIN AND RESET PIN
In addition to the functions shown in 1.1, 1.2 and 1.3, the P00/INT0 pin and RESET pin have a function for setting
the test mode in which the internal operation of the µPD7554A is tested (IC test only).
When a potential greater than VSS is applied to either of these pins, the test mode is set. As a result, if noise
exceeding VSS is applied during normal operation, the test mode will be entered and normal operation may be
impeded.
If, for example, the routing of the wiring between the P00/INT0 pin and RESET pin is long, the above problem
may occur as the result of inter-wiring noise between these pins.
Therefore, wiring should be carried out so as to suppress inter-wiring noise as far as possible. If it is not possible
to suppress noise, anti-noise measures should be taken using external parts as shown in the figures below.
• Connection of diode with small VF between P00/
INT4/RESET pin and VSS
• Connection of capacitor between P00/INT0/
RESET pin and VSS
VDD
VDD
Diode
with
Small VF
VDD
P00/INT0, RESET
VSS
VDD
P00/INT0, RESET
VSS
8

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