UPD780957 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD780957

8-Bit Single-Chip Microcontrollers

NEC => Renesas Technology 

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Major Revisions in This Edition (1/3)

Description

• Change of following register name

• 8-bit counter → 8-bit MR counter 0

• Serial mode register 3 → Serial operation mode register 3

• LCD0 mode register → LCD display mode register 0

• LCD0 clock select register → LCD clock control register 0

• Change of main system clock symbol as shown below.

fX → fCC

• Change of example of main system clock oscillation frequency as shown below.

1.0 MHz → 1.2 MHz

• Modification of description of minimum instruction execution time

Timer overview table moved from CHAPTER 7 16-BIT TIMER/EVENT COUNTER 0 to 1.8 Overview of

Functions.

Modification of Figure 2-3. Connection Example of VROUT0, VROUT1

Modification of Table 2-1. Types of Pin I/O Circuits

3.1.2 Internal data memory space

Addition of descriptions to (1) Internal high-speed RAM and (2) Internal expansion RAM

Modification of Figure 4-2. Block Diagram of P00 to P06

Addition of Figure 4-4. Block Diagram of P22 to P27

Addition of Figure 4-5. Block Diagram of P30, P32, and P35

Addition of Figure 4-6. Block Diagram of P31 and P37

Addition of Figure 4-9. Block Diagram of P50 to P55

Addition of RESET pin to Table 4-4. Mask Option of Mask-ROM Version

Modification of Figure 5-1. Block Diagram of Clock Generator

Addition of Table 5-2. System Clock Supplied to Each Peripheral Hardware

Modification of Table 5-3. Relationship Between CPU Clock and Minimum Instruction Execution Time

Modification of Figure 5-4. External Circuit of Main System Clock Oscillator

Modification of 5.5.1 Main system clock operations

Total revision of 5.6.2 System clock and CPU clock switching procedure

• Modification of Figure 5-11. System Clock and CPU Clock Switching

• Modification of descriptions in <1> to <4>

• Modification of description in Note

• Addition of Caution 1, modification of descriptions in Cautions 2 and 3

Deletion of one-shot pulse output function from CHAPTER 7 16-BIT TIMER/EVENT COUNTER 0

Modification of Figure 7-1. Block Diagram of 16-Bit Timer/Event Counter 0

Modification of Table 7-2. TI00/TO0/P31 Pin Valid Edge and Capture/Compare Register Capture Trigger

Modification of Figure 7-2. Format of 16-Bit Timer Mode Control Register 0 (TMC0)

Addition of Caution 4 to Figure 7-3. Format of Capture/Compare Control Register 0 (CRC0)

Modification of Figure 7-4. Format of 16-Bit Timer Output Control Register 0 (TOC0)

Addition of Note to Figure 7-5. Format of Prescaler Mode Register 0 (PRM0)

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User’s Manual U13655EJ2V1UD

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