UPD780957 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD780957

8-Bit Single-Chip Microcontrollers

NEC => Renesas Technology 

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Major Revisions in This Edition (3/3)

Description

(2) Communication operation in 14.3 Control Registers of Serial Interface UART2

• Modification of Figure 14-7. Generation Timing of Asynchronous Serial Interface Transmission

Completion Interrupt Request

• Addition of Caution 3 to Figure 14-7. Generation Timing of Asynchronous Serial Interface

Transmission Completion Interrupt Request

• Addition of Note to (d) Reception

• Modification of Figure 14-8. Generation Timing of Asynchronous Serial Interface Reception

Completion Interrupt Request

• Modification of Figure 14-9. Receive Error Timing

• Addition of (f) Clearing of RXE2 during UART2 reception

Addition of Note 1 and Caution 3 to Figure 16-3. Format of LCD Display Mode Register 0 (LCDM0)

Addition of Caution to Figure 16-4. Format of LCD Clock Control Register 0 (LCDC0)

Total revision of 16.8 Display Mode

Addition of Caution 3 to Figure 17-2. Format of Interrupt Flag Registers

Addition of Figure 18-1. Standby Function

Addition of (2) Release by non-maskable interrupt request in 18.2.2 Releasing HALT mode

Modification of Caution 1 in CHAPTER 19 RESET FUNCTION

Modification of Figure 19-2. Reset Timing by RESET Input

Modification of Figure 19-3. Reset Timing by Watchdog Timer Overflow

Addition of Figure 19-4. Reset Timing After Power Application

Modification of Caution 5 in Table 19-1. Hardware Status After Reset

Addition of CHAPTER 20 µPD78F0958 (REFERENCE)

Addition of CHAPTER 22 SUB-HALT TEST PROGRAM

Addition of CHAPTER 23 ELECTRICAL SPECIFICATIONS

Addition of CHAPTER 24 PACKAGE DRAWING

Addition of CHAPTER 25 RECOMMENDED SOLDERING CONDITIONS

Modification of APPENDIX A DEVELOPMENT TOOLS

Addition of APPENDIX B NOTES ON TARGET SYSTEM DESIGN

Addition of APPENDIX D REVISION HISTORY

The mark shows major revised points.

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User’s Manual U13655EJ2V1UD

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