UPD780974 데이터 시트보기 (PDF) - NEC => Renesas Technology
부품명
상세내역
제조사
UPD780974 Datasheet PDF : 301 Pages
| |||
LIST OF FIGURES (3/4)
Figure No.
Title
Page
13-8. A/D Conversion ................................................................................................................................. 159
13-9. Example of Method of Reducing Current Consumption in Standby Mode ....................................... 160
13-10. Analog Input Pin Connection ............................................................................................................ 161
13-11. A/D Conversion End Interrupt Request Generation Timing .............................................................. 162
13-12. D/A Converter Mode Register (DAM1) Format ................................................................................. 163
14-1.
14-2.
14-3.
14-4.
14-5.
14-6.
14-7.
14-8.
14-9.
UART Block Diagram ........................................................................................................................ 165
Asynchronous Serial Interface Mode Register (ASIM) Format ......................................................... 168
Asynchronous Serial Interface Status Register (ASIS) Format ........................................................ 169
Baud Rate Generator Control Register (BRGC) Format .................................................................. 170
Error Tolerance (when k = 0) including Sampling Errors .................................................................. 176
Format of Transmit/Receive Data in Asynchronous Serial Interface ................................................ 177
Timing of Asynchronous Serial Interface Transmit Completion Interrupt .......................................... 179
Timing of Asynchronous Serial Interface Receive Completion Interrupt ........................................... 180
Receive Error Timing ........................................................................................................................ 181
15-1.
15-2.
15-3.
15-4.
15-5.
SIO3 Block Diagram ......................................................................................................................... 183
Serial Operation Mode Register (CSIM) Format ............................................................................... 185
Serial Operation Mode Register (CSIM) Format ............................................................................... 186
Serial Operation Mode Register (CSIM) Format ............................................................................... 187
Three-Wire Serial I/O Mode Timing .................................................................................................. 188
16-1. LCD Controller/Driver Block Diagram ............................................................................................... 190
16-2. LCD Clock Select Circuit Block Diagram .......................................................................................... 191
16-3. LCD Display Mode Register (LCDM) Format ................................................................................... 192
16-4. LCD Display Control Register (LCDC) Format ................................................................................. 193
16-5. Relationship between LCD Display Data Memory Contents and Segment/Common Outputs ......... 195
16-6. Common Signal Waveform ............................................................................................................... 197
16-7. Common Signal and Segment Signal Voltages and Phases ............................................................ 197
16-8. Example of Connection of LCD Drive Power Supply ........................................................................ 199
16-9. 4-Time-Division LCD Display Pattern and Electrode Connections ................................................... 200
16-10. 4-Time-Division LCD Panel Connection Example ............................................................................ 201
16-11. 4-Time-Division LCD Drive Waveform Examples (1/3 Bias Method) ............................................... 202
16-12. LCD Timer Control Register (LCDTM) Format ................................................................................. 203
17-1.
17-2.
17-3.
17-4.
17-5.
17-6.
17-7.
Sound Generator Block Diagram ...................................................................................................... 205
Concept of Each Signal .................................................................................................................... 206
Sound Generator Control Register (SGCR) Format ......................................................................... 208
Sound Generator Buzzer Control Register (SGBR) Format ............................................................. 210
Sound Generator Amplitude Register (SGAM) Format ..................................................................... 211
Sound Generator Output Operation Timing ...................................................................................... 212
Sound Generator Output Operation Timing ...................................................................................... 212
19
Share Link: 