VRE305 데이터 시트보기 (PDF) - Cirrus Logic
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VRE305 Datasheet PDF : 5 Pages
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VRE305
Product Innova tionFrom
3. THEORY OF OPERATION
The following discussion refers to the block diagram in Figure 1. A FET current source is used to bias a 6.3 V zener
diode. The zener voltage is divided by the resistor network R1 and R2. This voltage is then applied to the noninvert-
ing input of the operational amplifier which amplifies the voltage to produce a 5 V output. The gain is determined by
the resistor networks R3 and R4: G=1 + R4/R3. The 6.3 V zener diode is used because it is the most stable diode
over time and temperature.
The current source provides a closely regulated zener current, which determines the slope of the references’ volt-
age vs. temperature function. By trimming the zener current a lower drift over temperature can be achieved. But
since the voltage vs. temperature function is nonlinear this compensation technique is not well suited for wide tem-
perature ranges.
A nonlinear compensation network of thermistors and resistors is used in the VRE series voltage references. This
proprietary network eliminates most of the nonlinearity in the voltage vs. temperature function. By adjusting the
slope, a very stable voltage is produced over wide temperature ranges.
This network is less than 2% of the overall network resistance so it has a negligible effect on long term stability.
The proper connection of the VRE305 series voltage references with the optional trim resistor for initial error and
the optional capacitor for noise reduction is shown below. The VRE305 reference has the ground terminal brought
out on two pins (pin 4 and pin 7) which are connected together internally. This allows the user to achieve greater
accuracy when using a socket. Voltage references have a voltage drop across their power supply ground pin due to
quiescent current flowing through the contact resistance. If the contact resistance was constant with time and tem-
perature, this voltage drop could be trimmed out. When the reference is plugged into a socket, this source of error
can be as high as 20 ppm. By connecting pin 4 to the power supply ground and pin 7 to a high impedance ground
point in the measurement circuit, the error due to the contact resistance can be eliminated. If the unit is soldered
into place, the contact resistance is sufficiently small that it does not effect performance. Pay careful attention to the
circuit layout to avoid noise pickup and voltage drops in the lines.
EXTERNAL CONNECTIONS
+ VIN
V TEMP OUT
OPTIONAL
NOISE REDUCTION
CAPACITOR
CN
1µF
2
3
8
6
VRE305
5
7
4
+ VOUT
10KΩ
OPTIONAL
FINE TRIM
ADJUSTMENT
REF. GND
PIN CONFIGURATION
N/C 1
8
+VIN 2 VRE305 7
TEMP 3
TOP
VIEW
6
GND 4
5
NOISE
REDUCTION
REF. GND
VOUT
TRIM
VRE305DS
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