VSC8113QB 데이터 시트보기 (PDF) - Vitesse Semiconductor

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VSC8113QB

ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux with Integrated Clock Generation and Clock Recovery

Vitesse Semiconductor 

VITESSE

SEMICONDUCTOR CORPORATION

ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux

with Integrated Clock Generation and Clock Recovery

Data Sheet

VSC8113

CRU clock and data signals. (In this mode the VSC8113 operates just like the VSC8111). The receive section

also contains a SONET/SDH frame detector circuit which is used to provide frame pluses during the A1, A2

boundary in the serial to parallel converter. This only occurs when OOF is high. Both internal and external LOS

functions are supported.

VSC8113 Block Diagram

EQULOOP

DQ

TXDATAOUT+/-

TXCLKOUT+/-

FACLOOP

CMULOCKDET

1

QD

0

1

0

DSBLCRU

RXDATAIN+/-

CRUEQLP

CRULOCKDET

RXCLKIN+/-

LOSOUT

CRUREFCLK

1

1

0

REC-DATA 0

CRU

REC-CLK

0

1

losdet

1

0

cmurefclk

CRUREFSEL

FRAMER

OOF

FP

0

1

1:8

DEMUX

8

DQ

RXOUT[7:0]

0

Divide-by-8

1

RXLSCKOUT

10

01

8:1

MUX

8

QD

Divide-by-8

Divide-by-3/12

1

CMU

0

TXIN[7:0]

TXLSCKIN

TXLSCKOUT

RX50MCK

LOOPTIM0

REFCLKP+/-

REFCLK

LOOPTIM1

EQULOOP

LOSPECL

LOSTTL

LOSDETEN_

Page 2

© VITESSE SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

G52154-0, Rev 4.2

3/19/99

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