WM8805 데이터 시트보기 (PDF) - Wolfson Microelectronics plc
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WM8805 Datasheet PDF : 65 Pages
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WM8805
Production Data
PIN DESCRIPTION
PIN
NAME
Type
DESCRIPTION
1
DVDD
Supply
Digital core supply
2
RX1
Digital In
S/PDIF receive channel 1
3
RX0
Digital In
S/PDIF receive channel 0
4
SCLK
Digital In/Out Control interface clock / TRANS_ERR flag in hardware control mode. See
note 2.
5
GPO0 / SWIFMODE Digital In/Out General purpose digital output or selected functionality at hardware reset.
See note 2.
6
GPO1
Digital Out General purpose digital output
7
SDIN / HWMODE
Digital Input Control interface data input and hardware/software mode select at hardware
reset. See note 2.
8
SDOUT / GPO7
Digital In/Out Control interface data output / NON_AUDIO flag in hardware control mode /
GPO in 2-wire software control mode. See note 2.
9
CSB / GPO2
Digital In/Out Chip select / UNLOCK flag in hardware control mode / GPO in 2-wire
software control mode. See note 2.
10
RESETB
Digital Input System reset (active low)
11
PVDD
Supply
PLL core supply
12
PGND
Supply
PLL ground
13
CLKOUT
Digital Out High drive clock output at 64fs, 128fs, 256fs and 512fs
14
XOP
Digital Output Crystal output
15
XIN
Digital Input Crystal input
16
DOUT
Digital Out Audio interface data output
17
DIN
Digital In
Audio interface data input
18
BCLK
Digital In/Out Audio interface bit clock
19
LRCLK
Digital In/Out Audio interface left/right word clock
20
MCLK
Digital In/Out Master clock input or output
21
TX0
Digital Out S/PDIF transmit
22
RX7 / GPO6
Digital In/Out S/PDIF receive channel 7 or general purpose digital output
23
RX6 / GPO5
Digital In/Out S/PDIF receive channel 6 or general purpose digital output
24
RX5 / GPO4
Digital In/Out S/PDIF receive channel 5 or general purpose digital output
25
RX4 / GPO3
Digital In/Out S/PDIF receive channel 4 or general purpose digital output
26
RX3
Digital In
S/PDIF receive channel 3
27
RX2
Digital In
S/PDIF receive channel 2
28
DGND
Supply
Digital ground
Notes:
1. Digital input pins have Schmitt trigger input buffers.
2. Refer to Table 6 Device Configuration at Power up or Hardware Reset
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PD Rev 4.1 September 07
4
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