X24C04-2.7 데이터 시트보기 (PDF) - Xicor -> Intersil

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X24C04-2.7

Serial EEPROM

Xicor -> Intersil 

X24C04

Stop Condition

All communications must be terminated by a stop con-

dition, which is a LOW to HIGH transition of SDA when

SCL is HIGH. The stop condition is also used by the

X24C04 to place the device in the standby power

mode after a read sequence. A stop condition can only

be issued after the transmitting device has released

the bus.

Figure 1. Data Validity

SCL

SDA

Data Stable

Data

Change

Figure 2. Definition of Start and Stop

SCL

SDA

START Bit

STOP Bit

Acknowledge

Acknowledge is a software convention used to indicate

successful data transfer. The transmitting device, either

master or slave, will release the bus after transmitting

eight bits. During the ninth clock cycle the receiver will

pull the SDA line LOW to acknowledge that it received

the eight bits of data. Refer to Figure 3.

The X24C04 will respond with an acknowledge after

recognition of a start condition and its slave address. If

both the device and a write operation have been

selected, the X24C04 will respond with an acknowledge

after the receipt of each subsequent eight bit word.

In the read mode the X24C04 will transmit eight bits of

data, release the SDA line and monitor the line for an

acknowledge. If an acknowledge is detected and no

stop condition is generated by the master, the X24C04

will continue to transmit data. If an acknowledge is not

detected, the X24C04 will terminate further data

transmissions. The master must then issue a stop con-

dition to return the X24C04 to the standby power mode

and place the device into a known state.

REV 1.1.3 11/28/00

www.xicor.com

Characteristics subject to change without notice. 3 of 13

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