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X3100 데이터 시트보기 (PDF) - Intersil

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X3100 Datasheet PDF : 41 Pages
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X3100, X3101
Power-up Timing (Initial Power-up or after
Sleep Mode)
TPUR
VCC
VSLR
0V
VRGO
0V
VOLTAGE REGULATOR OUTPUT STATUS
(INTERNAL SIGNAL) VRGS
OVERCURRENT DETECTION STATUS
(INTERNAL SIGNAL) OCDS
STATUS REGISTER BIT 0
VRGS+OCDS
STATUS REGISTER BIT 2
(SWCEN = 0) CCES+OVDS
STATUS REGISTER BIT 2
(SWCEN = 1)
OVDS
5V ±10% (STABLE AND REPEATABLE)
VRGO TUNED TO 5V ±0.5%
5V
2ms (Typ.)
1
0
TOC
1
1 = X3100/1 in Overcurrent Protection Mode
0 = X3100/1 NOT in Overcurrent Protection Mode
0
1 1 = X3100/1 in Overcurrent Protection Mode OR VRGO Not Yet Tuned
0 = X3100/1 NOT in Overcurrent Protection Mode AND VRGO Tuned
0
TOV+200ms
1
0
1 = VCELL < VCE OR X3100/1 in Overcharge Protection Mode
0 = VCELL > VCE OR X3100/1 NOT in Overcharge Protection Mode
1
0
1 = X3100/1 in Overcharge Protection Mode
0 = X3100/1 NOT in Overcharge Protection Mode
AS2_AS0
SPI PORT
TOV + 200ms OR TUV + 200ms (WHICHEVER IS LONGER)
Any Read or Write Operation, except
turn-on of FETs can start here.
Charge, Discharge FETs can be
turned on here.
8
FN8110.1
January 3, 2008

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