SAF-XC161CJ-16F20F_02(2002) 데이터 시트보기 (PDF) - Infineon Technologies

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SAF-XC161CJ-16F20F_02
(Rev.:2002)

16-Bit Single-Chip Microcontroller

Infineon Technologies 

XC161

Derivatives

Preliminary

Summary of Features

• Up to 16 MBytes External Address Space for Code and Data

– Programmable External Bus Characteristics for Different Address Ranges

– Multiplexed or Demultiplexed External Address/Data Buses

– Selectable Address Bus Width

– 16-Bit or 8-Bit Data Bus Width

– Five Programmable Chip-Select Signals

– Hold- and Hold-Acknowledge Bus Arbitration Support

• Up to 103 General Purpose I/O Lines,

partly with Selectable Input Thresholds and Hysteresis

• On-Chip Bootstrap Loader

• Supported by a Large Range of Development Tools like C-Compilers,

Macro-Assembler Packages, Emulators, Evaluation Boards, HLL-Debuggers,

Simulators, Logic Analyzer Disassemblers, Programming Boards

• On-Chip Debug Support via JTAG Interface

• 144-Pin TQFP Package, 0.5 mm (19.7 mil) pitch

Ordering Information

The ordering code for Infineon microcontrollers provides an exact reference to the

required product. This ordering code identifies:

• the derivative itself, i.e. its function set, the temperature range, and the supply voltage

• the package and the type of delivery.

For the available ordering codes for the XC161 please refer to the “Product Catalog

Microcontrollers”, which summarizes all available microcontroller variants.

Note: The ordering codes for Mask-ROM versions are defined for each product after

verification of the respective ROM code.

This document describes several derivatives of the XC161 group. Table 1 enumerates

these derivatives and summarizes the differences. As this document refers to all of these

derivatives, some descriptions may not apply to a specific product.

For simplicity all versions are referred to by the term XC161 throughout this document.

Data Sheet

2

V1.0, 2002-03

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