SM8224B 데이터 시트보기 (PDF) - Nippon Precision Circuits

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SM8224B

Dual-Tone Receiver IC

Nippon Precision Circuits  

TIMING DIAGRAMS

FSK demodulator timing

L1/L2

1st Ring

SM8224B

101010... 1 Data

2nd Ring

PDWN

CDET

DOUT

tDAQ

tDCH

101010...1

Data

OSCOUT

tDOSC

P DWN is an internal signal (set by S0, S1, MODE)

Output timing

DOUT

DOUT

tr0

90%

10%

tf0

STR

STR

tf0

90%

10%

tr0

Data timing

TIP/RING

DOUT

STOP START

STOP START

b6 b7 1 0 b0 b1 b2 b3 b4 b5 b6 b7 1 0 b0 b1 b2 b3 b4 b5 b6

tIDD

b4 b5 b6 b7

START

b0 b1 b2 b3 b4 b5 b6 b7

b0 b1 b2 b3 b4

STOP

NIPPON PRECISION CIRCUITS—8

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