XE1205 데이터 시트보기 (PDF) - Semtech Corporation

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XE1205

180 MHz – 1GHz Low-Power, High Link Budget Integrated UHF Transceiver

Semtech Corporation 

XE1205

5.3.3 Transmitter in buffered mode.

The transmitter works in buffered mode if bit MCParam_Buffered_mode is high. Data to be transmitted is written to the

16-byte FIFO via the SPI interface. The data is loaded into a shift register which passes the data bit by bit to the data

shaping filter or directly to the frequency synthesizer (as explained in the previous section). The transmitter chain is

shown in Figure 13:

0

modulator

1

TXParam_Filter

Data

shaping

filter

shift register

dclk

FIFO

IRQ_0

/fifoempty

IRQ_1

SPI

MOSI

MISO

SCK

NSS_DATA

Figure 13: Transmit chain in buffered mode

FIFO operation in transmit mode is similar to receive mode; transmission either starts immediately after data is written

into the FIFO or when the FIFO is full, determined by the IRQParam_Start_full bit setting.

If the transmit FIFO is full the interrupt signal fifofull is asserted on pin IRQ_1 (if configured accordingly). If data is written

into the FIFO while it is full, the flag IRQParam_Fifooverrun will be set to ‘1’ and the previous FIFO contents will be

overwritten.

The IRQParam_Fifooverrun flag is cleared by writing a ‘1’ to it. At the same time this clears the contents of the FIFO.

Once the last data in the FIFO is loaded into the shift register, the flag /fifoempty is set to high on pin IRQ_0. If new data

is not written in the FIFO and the last bit of the shift register has been transferred to the frequency synthesizer, the bit

IRQParam_Tx_stopped goes high and the data seen by the frequency synthesizer is the last bit sent. If the transmitter is

switched off (e.g. entry into another mode), the transmission will stop immediately even if there is still unsent data in the

shift register.

In transmit mode the two interrupt signals are IRQ_0 and IRQ_1.

IRQ_1 is mapped to IRQParam_Fifofull signal indicating that the transmission FIFO is full when IRQParam_Tx_irq_1 is

set to ‘0’ and to TX_stopped when IRQParam_Tx_irq_1 is set to ‘1’.

IRQ_0 is mapped to the /fifoempty signal; this signal is used to indicate that the transmission FIFO is empty and must be

refilled with data to continue data transmission.

© Semtech 2008

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