SX8805R 데이터 시트보기 (PDF) - Semtech Corporation

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SX8805R

Sensing Machine Data Acquisition MCU with Zooming ADC and DACs

Semtech Corporation 

XE8805/05A

VPP/TEST

INSTRUCTION MEMORY

VBAT

VSS

RESET

OSCIN

OSCOUT

VREG

PB(7:0)

CPU

B

COOLRISC816

U

S

C

O

N

T

R

O

L

L

8X8 MULTIPLIER

E

R

16 CPU REGISTERS

RESET BLOCK

WD POR

RC

XTAL

VREG

CLOCK

GENERATION/

POWER

MANAGEMENT

TEST CONTROLLER

8 DATA REGISTERS

IRQ HANDLING

EVN HANDLING

PORT B

address

control

datain

dataout

reset

control

clocks

test

control

irq

evn

VLD

DATA

MEMORY

PORT A

PORT C

ACQUISITION

CHAIN

ZoomingADCTM

VMULT

DAS

Signal D/A

DAB

Bias D/A

USRT

UART

COUNTERS

TIMERS

PWM

PA(7:0)

PC(7:0)

AC_R(3:0)

AC_A(7:0)

VMULT

DAS_OUT

DAS_AI_P

DAS_AI_M

DAS_AO

DAB_R_P

DAB_R_M

DAB_OUT

DAB_AI_P

DAB_AI_M

DAB_AO_P

DAB_AO_M

Figure 1-1. Block schematic of the XE8805/05A circuit.

The UART (universal asynchronous receiver/transmitter) contains a full hardware implementation of the

asynchronous serial link.

The counters/timers/PWM can take their clocks from internal or external sources (on Port A) and can generate

interrupts or events. The PWM is output on Port B.

© Semtech 2006

www.semtech.com

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