L9925 데이터 시트보기 (PDF) - STMicroelectronics
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L9925 Datasheet PDF : 9 Pages
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L9925
Logic Levels
All inputs are positive, non inverting logic
Logic State
0
1
Voltage Range
-0.3 to 1.5V
3.5 to 6.0V
Truth Table
Enable/ Disable
EN1 EN0
0
0
0
1
1
0
1
1
Bridge 1
Disabled
Disabled
Enabled
Enabled
Bridge 2
Disabled
Enabled
Disabled
Enabled
Figure 1. Timing Diagram
Iq
<200µA
<12mA
<12mA
<12mA
General Operation
With the bridge enabled, each input INx, maps di-
rectly to the corresponding output OUTx.
The output voltage will be equal to the difference
between the supply rail and the product of the
load current ad the on resistance of the output
switch.Vout = Vsupply - (RDS,ON ⋅ ILOAD).
Sourced load currents are positive.
IN1 OUT1 IN2 OUT2 IN3 OUT3 IN4 OUT4
0
0
0
0
0
0
0
0
1 VS 1 VS 1 VS 1 VS
STANDBY MODE
OPERATING MODE
OVERTEMPERATURE
STANDBY MODE
EN2
EN1
IN1
IN2
tdSB
OUT1 Tristate
tdSB
tdON
tdOFF
50%
90%
10%
tr
tdOFF
tf
tdON
OUT2 Tristate
tr
tf
Figure 2. Typical RON - Characteristics of Source
and Sink Stage
Tristate
tdSB
Tristate
Tristate
Tristate
D99AT425
tdSB
Figure 3. ON - Resistance vs Supply Voltage
RON
(Ω)
2
1
VVS=6V
VVS=12V
-40 -20 0 20 40 60 80 100 120 140 160 T(°C)
D99AT426
RON
(Ω)
1.9
1.5
IOUT1/2=±0.3A
0.9
0.75
6
12
max for TJ≤125°C
typ. for TJ=25°C
16.5
VVS(V)
D99AT427
4/9
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