HT9170
V DD
H T 9170 VDD
S e r ie s
C
R T /G T
R
EST
(a) Fundamental circuit:
tGTP = R ´ C ´ Ln (VDD / (VDD - VTRT))
tGTA = R ´ C ´ Ln (VDD / VTRT)
H T 9170 VDD
S e r ie s
R T /G T
EST
V DD
C
R1
D1 R2
V DD
H T 9170 VDD
S e r ie s
R T /G T
EST
C
R1
D1 R2
(c) tGTP > tGTA :
tGTP = R1 ´ C ´ Ln (VDD / (VDD - VTRT))
tGTA = (R1 // R2) ´ C ´ Ln (VDD / VTRT)
(b) tGTP < tGTA :
tGTP = (R1 // R2) ´ C ´ Ln (VDD - VTRT))
tGTA = R1 ´ C ´ Ln (VDD / VTRT)
Figure 5. Steering time adjustment circuits
DTMF dialing matrix
C O L1 C O L2 C O L3 C O L4
ROW 1 1
2
3
A
ROW 2 4
5
6
B
ROW 3 7
8
9
C
ROW 4 *
0
#
D
9
December 20, 1999