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LTC2451CTS8

Ultra-Tiny, 16-Bit DS ADC with I2C Interface

Linear Technology 

LTC2451

APPLICATIONS INFORMATION

POWER-ON RESET

CONVERSION

if the power supply voltage, VCC, is restored within the

operating range (2.7V to 5.5V) before the end of the POR

time interval.

SLEEP

NO

READ/WRITE

ACKNOWLEDGE

YES

DATA INPUT/OUTPUT

NO

STOP

OR READ

16 BITS

2451 F01

YES

Figure 1. State Diagram

begins outputting the conversion result under the control of

the serial clock (SCL). There is no latency in the conversion

result. The data output is 16 bits long and outputs from

MSB to LSB. Data is updated on the falling edges of

SCL, allowing the user to reliably latch data on the rising

edge of SCL. In Write operation, the device accepts one

configuration byte and the data is shifted in on the rising

edges of SCL. A new conversion is initiated by a Stop

condition following a valid Read or Write operation, or by

the conclusion of a complete Read cycle (all 16 bits read

out of the device).

Power-Up Sequence

When the power supply voltage, VCC, applied to the con-

verter is below approximately 2.1V, the ADC performs a

power-on reset. This feature guarantees the integrity of

the conversion result.

When VCC rises above this threshold, the converter

generates an internal power-on reset (POR) signal for

approximately 0.5ms. The POR signal clears all internal

registers. Following the POR signal, the LTC2451 starts

a conversion cycle and follows the succession of states

described in Figure 1. The first conversion result following

POR is accurate within the specifications of the device

Ease of Use

The LTC2451 data output has no latency, filter settling

delay, or redundant results associated with the conversion

cycle. There is a one-to-one correspondence between the

conversion and the output data. Therefore, multiplexing

multiple analog input voltages requires no special

actions.

In the 30Hz mode, the LTC2451 performs offset calibrations

during every conversion. This calibration is transparent

to the user and has no effect upon the cyclic operation

previously described. The advantage of continuous

calibration is stability of the ADC performance with respect

to time and temperature.

The LTC2451 includes a proprietary input sampling scheme

that reduces the average input current by several orders

of magnitude when compared to traditional delta-sigma

architectures. This allows external filter networks to interface

directly to the LTC2451. Since the average input sampling

current is 50nA, an external RC lowpass filter using a 1kΩ

and 0.1μF results in less than 1LSB additional error.

Reference Voltage Range

This converter accepts a truly differential external reference

voltage. The voltage range for the REF+ and REF– pins covers

the entire operating range of the device (GND to VCC). For

correct converter operation, VREF+ – VREF– ≥ 2.5V.

The LTC2451 differential reference input range is 2.5V to

VCC. For the simplest operation, REF+ can be shorted to

VCC and REF– can be shorted to GND.

Input Voltage Range

Ignoring offset and full-scale errors, the converter will

theoretically output an “all zero” digital result when the

input is at VREF– (a zero scale input) and an “all one” digital

result when the input is at VREF+ (a full-scale input). In an

underrange condition, for all input voltages less than the

voltage corresponding to output code 0, the converter will

2451ff

8

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