AT24C01D-CUM-T 데이터 시트보기 (PDF) - Unspecified

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AT24C01D-CUM-T

I2C-Compatible (2-wire) Serial EEPROM 1-Kbit (128 x 8) or 2-Kbit (256 x 8)

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2. Device Block Diagram and System Configuration

Figure 2-1. Block Diagram

A0

A1

A2

GND

Hardware

Address

Comparator

High Voltage

Generation Circuit

Memory

System Control

Module

Power

On Reset

Generator

EEPROM Array

1 page

Column Decoder

Data Register

Data & ACK

DOUT Input/Output Control

DIN

Write

Protection

Control

Address Register

and Counter

Start

Stop

Detector

VCC

WP

SCL

SDA

Figure 2-2.

VCC

VCC

System Configuration Using 2-Wire Serial EEPROMs

SCL

RPUP(max) = tR(max)

0.8473 x CL

RPUP(min) = VCC - VOL(max)

IOL

SDA

WP

I2C Bus Master:

Microcontroller

GND

A0

VCC

A1 Slave 0 WP

A2 AT24Cxxx SDA

GND

SCL

A0

VCC

A1 Slave 1 WP

A2 AT24Cxxx SDA

GND

SCL

A0

VCC

A1 Slave 7 WP

A2 AT24Cxxx SDA

GND

SCL

AT24C01D and AT24C02D [DATASHEET]

3

Atmel-8871D-SEEPROM-AT24C01D-02D-Datasheet_102015

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