AD9281 데이터 시트보기 (PDF) - Analog Devices
부품명
상세내역
제조사
AD9281 Datasheet PDF : 19 Pages
| |||
Parameter
DYNAMIC PERFORMANCE (SE)1
Signal-to-Noise and Distortion
f = 3.58 MHz
Signal-to-Noise
f = 3.58 MHz
Total Harmonic Distortion
f = 3.58 MHz
Spurious Free Dynamic Range
f = 3.58 MHz
DIGITAL INPUTS
High Input Voltage
Low Input Voltage
DC Leakage Current
Input Capacitance
LOGIC OUTPUT (with DVDD = 3 V)
High Level Output Voltage
(IOH = 50 µA)
Low Level Output Voltage
(IOL = 1.5 mA)
LOGIC OUTPUT (with DVDD = 5 V)
High Level Output Voltage
(IOH = 50 µA)
Low Level Output Voltage
(IOL = 1.5 mA)
Data Valid Delay
MUX Select Delay
Data Enable Delay
Symbol
SINAD
SNR
THD
SFDR
VIH
VIL
IIN
CIN
VOH
VOL
VOH
VOL
tOD
tMD
tED
Data High-Z Delay
tDHZ
CLOCKING
Clock Pulsewidth High
tCH
Clock Pulsewidth Low
tCL
Pipeline Latency
NOTES
1SE is single ended input, REFT = 1.5 V, REFB = –0.5 V.
2AIN differential 2 V p-p, REFT = 1.5 V, REFB = –0.5 V.
3IMD referred to larger of two input signals.
Specifications subject to change without notice.
Min Typ Max
47.2
48
–55
–58
2.4
0.3
±6
2
2.88
0.095
4.5
0.4
11
7
13
13
16.9
16.9
3.0
Units Condition
AD9281
dB
dB
dB
dB
V
V
µA
pF
V
V
V
V
ns
ns
ns
CL = 20 pF. Output Level to
90% of Final Value
ns
ns
ns
Cycles
REV. E
tOD
CLOCK
INPUT
ADC SAMPLE
#1
ADC SAMPLE
#2
ADC SAMPLE
#3
ADC SAMPLE
#4
ADC SAMPLE
#5
SELECT
INPUT
DATA
OUTPUT
Q CHANNEL
tMD
OUTPUT ENABLED
I CHANNEL
OUTPUT ENABLED
SAMPLE #1-3
Q CHANNEL
OUTPUT
SAMPLE #1-1
Q CHANNEL
OUTPUT
SAMPLE #1-2
Q CHANNEL
OUTPUT
SAMPLE #1
Q CHANNEL
OUTPUT
SAMPLE #2
Q CHANNEL
OUTPUT
SAMPLE #1-1
I CHANNEL
OUTPUT
Figure 1. ADC Timing
SAMPLE #1
I CHANNEL
OUTPUT
–3–
Share Link: 