74LV174D 데이터 시트보기 (PDF) - NXP Semiconductors.
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74LV174D Datasheet PDF : 14 Pages
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Philips Semiconductors
Hex D-type flip-flop with reset; positive edge-trigger
Product specification
74LV174
DC CHARACTERISTICS FOR THE LV FAMILY (Continued)
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
SYMBOL PARAMETER
TEST CONDITIONS
LIMITS
-40°C to +85°C
II
Input leakage
current
VCC = 5.5V; VI = VCC or GND
1.0
ICC
Quiescent supply
current; MSI
VCC = 5.5V; VI = VCC or GND; IO = 0
20.0
Additional
∆ICC quiescent supply VCC = 2.7V to 3.6V; VI = VCC –0.6V
500
current per input
NOTE:
1. All typical values are measured at Tamb = 25°C.
-40°C to +125°C
1.0
160
850
UNIT
µA
µA
µA
AC CHARACTERISTICS
GND = 0V; tr = tf = 2.5ns; CL = 50pF; RL = 1KΩ
SYMBOL
PARAMETER
WAVEFORM
tPHL/tPLH
Propagation delay
CP to Qn
Figure 1
tPHL
Propagation delay
MR to Qn
Figure 2
tW
Clock pulse width
HIGH to LOW
Figure 1
tW
Master reset pulse
width LOW
Figure 2
trem
Removal time
MR to CP
Figure 2
tsu
Set-up time
Dn to CP
Figure 3
CONDITION
VCC(V)
1.2
2.0
2.7
3.0 to 3.6
4.5 to 5.5
1.2
2.0
2.7
3.0 to 3.6
4.5 to 5.5
2.0
2.7
3.0 to 3.6
4.5 to 5.5
2.0
2.7
3.0 to 3.6
4.5 to 5.5
1.2
2.0
2.7
3.0 to 3.6
4.5 to 5.5
1.2
2.0
2.7
3.0 to 3.6
4.5 to 5.5
LIMITS
–40 to +85 °C
MIN TYP1 MAX
–
100
–
–
34
43
–
25
31
–
192
25
–
133
21
–
80
–
–
27
43
–
20
31
–
152
25
–
113
21
34
10
–
25
8
–
20
62
–
13
43
34
9
–
25
6
–
20
5
–
13
42
–
–20
–
5
–7
–
5
–5
–
5
–42
–
5
–33
–
10
–
22
4
–
16
3
–
13
22
–
9
13
LIMITS
–40 to +125 °C
MIN MAX
–
–
–
53
–
39
–
31
–
26
–
–
–
53
–
39
–
31
–
26
41
–
30
–
24
–
16
41
–
30
–
24
–
16
–
–
5
–
5
–
5
–
5
–
–
26
–
19
–
15
–
10
UNIT
ns
ns
ns
ns
ns
ns
1998 May 20
6
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