MC10E1652 데이터 시트보기 (PDF) - Motorola => Freescale
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MC10E1652 Datasheet PDF : 7 Pages
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–0.8
–1.0
HYSTERESIS
–1.2
–1.4
–1.6
–1.8
–20 –16 –12 –8 –4 Vref 4 8 12 16 20
Vin, DIFFERENTIAL INPUT VOLTAGE (mV)
Figure 1. Typical Hysteresis Curve
MC10E1652
40
30
T=
T=
25°C
85°C
20
T = 0°C
10
0
–0.2 –0.1 0.0 0.1 0.2 0.3 0.4 0.5
PROGRAMMING VOLTAGE (VOLTAGE ABOVE VEE)
Figure 2. Hysteresis Programming Voltage
AC CHARACTERISTICS
(VEE = –5.2 V ±5%; VCC = +5.0 V ±5%)
0°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Unit Condition
tPLH
Propagation Delay to Output
ps
1
tPHL
V to Q
600 750 900 625 775 925 700 850 1050
LEN to Q
400 575 750 400 575 750 500 650 850
ts
Setup Time
V
ps
450 300
450 300
550 350
th
Enable Hold Time
V
ps
–50 –250
–50 –250
–100 –250
tpw
Minimum Pulse Width
ps
LEN
400
400
400
tskew
TDE
Within Device Skew
Delay Dispersion
(ECL Levels)
15
15
15
ps
2
ps
100
3, 4
60
3, 5
TDL
Delay Dispersion
(TTL Levels)
ps
350
6, 7
100
5, 6
tr
Rise/Fall Times
tf
20-80%
ps
225 325 475 225 325 475 250 375 500
1. The propagation delay is measured from the crosspoint of the input signal and the threshold value to the crosspoint of the Q and Q output signals.
For propagation delay measurements the threshold level (VTHR) is centered about an 850 mV input logic swing with a slew rate of 0.75 V/NS.
There is an insignificant change in the propagation delay over the input common mode range.
2. tskew is the propagation delay skew between comparator A and comparator B for a particular part under identical input conditions.
3. Refer to Figure 4 and note that the input is at 850 mV ECL levels with the input threshold range between the 20% and 80% points. The delay
is measured from the crosspoint of the input signal and the threshold value to the crosspoint of the Q and Q output signals.
4. The slew rate is 0.25 V/NS for input rising edges.
5. The slew rate is 0.75 V/NS for input rising edges.
6. Refer to Figure 5 and note that the input is at 2.5 V TTL levels with the input threshold range between the 20% and 80% points. The delay is
measured from the crosspoint of the input signal and the threshold value to the crosspoint of the Q and Q output signals.
7. The slew rate is 0.3 V/NS for input rising edges.
APPLICATIONS INFORMATION
The timing diagram (Figure 3) is presented to illustrate the
MC10E1652’s compare and latch features. When the signal
on the LEN pin is at a logic high level, the device is operating
in the “compare mode,” and the signal on the input arrives at
the output after a nominal propagation delay (tPHL, tPLH). The
input signal must be asserted for a time, ts, prior to the
negative going transition on LEN and held for a time, th, after
the LEN transition. After time th, the latch is operating in the
“latch mode,” thus transitions on the input do not appear at
the output. The device continues to operate in the “latch
mode” until the latch is asserted once again. Moreover, the
LEN pulse must meet the minimum pulse width (tpw)
ECLinPS and ECLinPS Lite
2–3
DL140 — Rev 4
MOTOROLA
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