RC224ATLV 데이터 시트보기 (PDF) - Conexant Systems

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RC224ATLV

Embedded Modem Family

Conexant Systems 

RC224ATL/224ATLV

EmbeddedModem Family

2.0 Hardware Interface

2.1 Hardware Interface

Modem Control Register The Modem Control Register (MCR) controls the interface with the modem or

(Addr = 4) data set.

7

6

5

4

3

2

1

0

0

0

0

LL

OUT2

OUT1

RTS

DTR

Bit 5-7:

LL

OUT2

OUT1

RTS

DTR

Not used (always 0).

Local Loopback. When this bit is set to a logic 1, the

diagnostic mode is selected and the following occurs:

1. Data written to the Transmit Holding Register will be

looped back to the Receiver Buffer Register.

2. The four modem control bits (CTS, DSR, RI, and DCD)

are internally connected to the four modem control

outputs (RTS, DTR, OUT1, and OUT2), respectively.

Output 2. When this bit is a logic 1, HINT is enabled. When

this bit is a logic 0, HINT is in the high impedance state.

Output 1. This bit is used in local loopback (see MCR4).

Request to Send. This bit controls the Request to Send (RTS)

function. When this bit is a logic 1, RTS is on. When this bit is

a logic 0, RTS is off.

Data Terminal Ready. This bit controls the Data Terminal

Ready (DTR) function. When this bit is a logic 1, DTR is on.

When this bit is a logic 0, DTR is off.

D224ATLVDSC

Conexant

2-9

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