74LV259D(2016) 데이터 시트보기 (PDF) - NXP Semiconductors.
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74LV259D Datasheet PDF : 19 Pages
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NXP Semiconductors
11. Waveforms
74LV259
8-bit addressable latch
9&&
'LQSXW
*1'
9&&
/(LQSXW
*1'
92+
4QRXWSXW
92/
90
W:
W3+/
90
W3/+
DDK
Fig 6.
Measurement points are given in Table 9.
VOL and VOH are typical voltage output levels that occur with the output load.
The enable input (LE) to output (Qn) propagation delays and the enable input pulse width
9&&
$QLQSXW
*1'
92+
4QRXWSXW
92/
90
W3+/
90
W3/+
DDK
Fig 7.
Measurement points are given in Table 9.
VOL and VOH are typical voltage output levels that occur with the output load.
The address input (An) to output (Qn) propagation delays
9&&
'LQSXW
*1'
92+
4QRXWSXW
92/
90
W3+/
90
W3/+
DDK
Fig 8.
Measurement points are given in Table 9.
VOL and VOH are typical voltage output levels that occur with the output load.
The data input (D) to output (Qn) propagation delays
74LV259
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 9 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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