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74LVT16374A 데이터 시트보기 (PDF) - NXP Semiconductors.

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74LVT16374A Datasheet PDF : 19 Pages
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NXP Semiconductors
74LVT16374A; 74LVTH16374A
3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
VI
input voltage
VO
output voltage
output in OFF-state or
HIGH-state
0.5
+4.6
V
[1] 0.5
+7.0
V
[1] 0.5
+7.0
V
IIK
input clamping current
VI < 0 V
50
-
mA
IOK
output clamping current
VO < 0 V
50
-
mA
IO
output current
output in LOW-state
output in HIGH-state
-
128
mA
64
-
mA
Tstg
storage temperature
65
+150
°C
Tj
junction temperature
[2] -
150
°C
Ptot
total power dissipation
Tamb = 40 °C to +85 °C
(T)SSOP48 package
[3] -
500
mW
VFBGA56 and
[4] -
HXQFN60U package
1 000
mW
[1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability.
[3] Above 60 °C the value of Ptot derates linearly with 5.5 mW/K.
[4] Above 70 °C the value of Ptot derates linearly with 1.8 mW/K.
8. Recommended operating conditions
Table 5.
Symbol
VCC
VI
VIH
VIL
IOH
IOL
Tamb
Δt/ΔV
Recommended operating conditions
Parameter
Conditions
supply voltage
input voltage
HIGH-level input voltage
LOW-level input voltage
HIGH-level output current
LOW-level output current
none
ambient temperature
current duty cycle 50 %;
fi 1 kHz
in free-air
input transition rise and fall rate outputs enabled
Min Typ Max Unit
2.7
-
3.6
V
0
-
5.5
V
2.0
-
-
V
-
-
0.8
V
32 -
-
mA
-
-
32
mA
-
-
64
mA
40 -
-
-
+85 °C
10
ns/V
74LVT_LVTH16374A_7
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 07 — 22 March 2010
© NXP B.V. 2010. All rights reserved.
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