A67L9336E-3.5F 데이터 시트보기 (PDF) - AMIC Technology

부품명

상세내역

제조사

A67L9336E-3.5F

1M X 18, 512K X 36 LVTTL, Pipelined ZeBL™ SRAM

AMIC Technology 

A67L0618/A67L9336

Pin Description (continued)

Pin No.

LQFP (X18)

LQFP (X36)

64

64

Symbol

ZZ

88

88

R/ W

74, 73, 72, 69, 68,

63, 62, 59, 58,

24, 23, 22, 19, 18

13, 12, 9, 8

31

51, 52, 53, 56, 57,

58, 59, 62, 63

68, 69, 72, 73, 74,

75, 78, 79, 80

1, 2, 3, 6, 7, 8, 9,

12, 13,

18, 19, 22, 23, 24,

25, 28, 29, 30

31

I/Oa

I/Ob

I/Oc

I/Od

MODE

1, 2, 3, 6, 7, 25, 28,

29, 30, 38, 39,

42,43 51, 52, 53,

56, 57, 75, 78, 79,

95, 96

15, 41, 65, 91

38,39,42,43

15, 41, 65, 91

14, 16, 66

14, 16, 66

NC

VCC

VCC

4, 11, 20, 27,

54, 61, 70, 77

17, 40, 90

5,10,21,26,

55,60,71,76

4, 11, 20, 27, 54,

61, 70, 77

17, 40, 90

5,10,21,26,

55,60,71,76

VCCQ

VSS

VSSQ

Description

Snooze Enable : This active high asynchronous input causes

the device to enter a low-power standby mode in which all

data in the memory array is retained. When active, all other

inputs are ignored.

Read/Write : This active input determines the cycle type

when ADV/LD is LOW. This is the only means for

determining READs and WRITEs. READ cycles may not be

converted into WRITEs (and vice versa) other than by

loading a new address. A LOW on this pin permits BYTE

WRITE operations and must meet the setup and hold times

around the rising edge of CLK. Full bus width WRITEs occur

if all byte write enables are LOW.

SRAM Data I/O : Byte “a” is I/Oa pins; Byte “b” is I/Ob pins;

Byte “c” is I/Oc pins; Byte “d” is I/Od pins. Input data must

meet setup and hold times around CLK rising edge.

Mode : This input selects the burst sequence. A LOW on this

pin selects linear burst. NC or HIGH on this pin selects

interleaved burst. Do not alter input state while device is

operating.

No Connect : These pins can be left floating or connected to

GND to minimize thermal impedance.

Power Supply : See DC Electrical Characteristics and

Operating Conditions for range.

These pins do not have to be connected directly to VCC as

long as the input voltage is ≥ VIH. This input is not connected

to VCC bus internally.

Isolated Output Buffer Supply : See DC Electrical

Characteristics and Operating Conditions for range.

Ground : GND.

Isolated Output Buffer Ground

PRELIMINARY (March, 2006, Version 0.1)

7

AMIC Technology, Corp.

Share Link: