AD8403AN1 데이터 시트보기 (PDF) - Analog Devices
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AD8403AN1 Datasheet PDF : 32 Pages
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AD8400/AD8402/AD8403
Parameter
Symbol
Conditions
Min
DYNAMIC CHARACTERISTICS6, 10
Bandwidth −3 dB
BW_50 K R = 50 kΩ
BW_100 K R = 100 kΩ
Total Harmonic Distortion
THDW
VA = 1 V rms + 2 V dc, VB = 2 V dc, f = 1 kHz
VW Settling Time
tS_50 K
VA = VDD, VB = 0 V, ±1% error band
tS_100 K
VA = VDD, VB = 0 V, ±1% error band
Resistor Noise Voltage
eNWB_50 K RWB = 25 kΩ, f = 1 kHz, RS = 0
eNWB_100 K RWB = 50 kΩ, f = 1 kHz, RS = 0
Crosstalk 11
CT
VA = VDD, VB = 0 V
Typ1 Max Unit
125
71
0.003
9
18
20
29
−65
kHz
kHz
%
μs
μs
nV/√Hz
nV/√Hz
dB
1 Typicals represent average readings at 25°C and VDD = 5 V.
2 Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. See the test circuit in Figure 38.
IW = VDD/R for VDD = 3 V or 5 V for the 50 kΩ and 100 kΩ versions.
3 VAB = VDD, wiper (VW) = no connect.
4 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.
DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions. See the test circuit in Figure 37.
5 Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.
6 Guaranteed by design and not subject to production test. Resistor-terminal capacitance tests are measured with 2.5 V bias on the measured terminal. The remaining
resistor terminals are left open circuit.
7 Measured at the Ax terminals. All Ax terminals are open-circuited in shutdown mode.
8 Worst-case supply current consumed when input logic level at 2.4 V, standard characteristic of CMOS logic. See Figure 28 for a plot of IDD vs. logic voltage.
9 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
10 All dynamic characteristics use VDD = 5 V.
11 Measured at a VW pin where an adjacent VW pin is making a full-scale voltage change.
Rev. E | Page 7 of 32
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