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AD9300 데이터 시트보기 (PDF) - Analog Devices

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AD9300
ADI
Analog Devices ADI
AD9300 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
AD9300
AD9300 APPLICATIONS
To ensure optimum performance from circuits using the AD9300,
it is important to follow a few basic rules that apply to all high
speed devices.
A large, low-impedance ground plane under the AD9300 is
critical. Generally, GROUND and GROUND RETURN con-
nections should be connected solidly to this plane. GROUND
pin connections are signal isolation grounds that are not
Figure 2. 4 x 1 AD9300 Multiplexer with Buffered Output
Driving 75 Coaxial Cable
connected internally; they can be left unconnected, but there
may be some degradation in crosstalk rejection. GROUND RE-
TURN, on the other hand, serves as the internal ground refer-
ence for the AD9300 and, without exception, should be
connected to the ground plane.
The output stage of the unit is capable of driving a 2 kʈ10 pF
load. Larger capacitive loads may limit full power bandwidth
and increase tOFF (the interval between the 50% point of the
ENABLE high-to-low transition and the instant the output
becomes a high impedance).
For applications such as driving cables (see Figure 2), output
buffers are recommended.
It is recommended that the AD9300 be soldered directly into
circuit boards rather than using socket assemblies. If sockets
must be used, individual pin sockets are preferred rather than a
socket assembly. A second requirement for proper high speed
design involves decoupling the power supply and
internal bias supply lines from ground to improve noise immu-
nity. Chip capacitors are recommended for connecting 0.1 µF
and 0.01 µF capacitors between ground and the ± VS supplies
(Pins 9 and 14) and the BYPASS connection (Pin 15).
Figure 3. Harmonic Distortion vs.
Frequency
Figure 4. Output vs. Frequency
Figure 5. Crosstalk vs. Frequency
Figure 6. Test Circuit for Harmonic Distortion, Pulse
Response, T-Step Response and Disable Characteristics
–6–
Figure 7. Crosstalk Rejection Test Circuit
REV. A

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