ADG751 데이터 시트보기 (PDF) - Analog Devices
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ADG751 Datasheet PDF : 11 Pages
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PIN CONFIGURATIONS
8-Lead SOIC
(RM-8)
NC 1
8 VDD
S 2 ADG751 7 D
TOP VIEW
GND 3 (Not to Scale) 6 NC
IN 4
5 NC
NC = NO CONNECT
6-Lead SOT-23
(RT-6)
S1
6D
VDD 2 ADG751 5 GND
TOP VIEW
NC 3 (Not to Scale) 4 IN
NC = NO CONNECT
ADG751
TERMINOLOGY
VDD
GND
S
D
IN
RON
RFLAT(ON)
IS (OFF)
ID (OFF)
ID, IS (ON)
VD (VS)
CS (OFF)
CD (OFF)
CD, CS (ON)
tON
tOFF
Off Isolation
Charge
Injection
Bandwidth
On Response
Insertion Loss
VINL
VINH
IINL(IINH)
IDD
Most positive power supply potential.
Ground (0 V) reference.
Source terminal. May be an input or output.
Drain terminal. May be an input or output.
Logic control input.
Ohmic resistance between D and S.
Flatness is defined as the difference between
the maximum and minimum value of on resis-
tance as measured over the specified analog
signal range.
Source leakage current with the switch “OFF.”
Drain leakage current with the switch “OFF.”
Channel leakage current with the switch “ON.”
Analog voltage on terminals D and S.
“OFF” switch source capacitance.
“OFF” switch drain capacitance.
“ON” switch capacitance.
Delay between applying the digital control
input and the output switching on. See Test
Circuit 4.
Delay between applying the digital control
input and the output switching off.
A measure of unwanted signal coupling
through an “OFF” switch.
A measure of the glitch impulse transferred from
the digital input to the analog output during
switching.
The frequency at which the output is attenu-
ated by –3 dBs.
The frequency response of the “ON” switch.
Loss due to the ON resistance of the switch.
Maximum input voltage for Logic “0.”
Minimum input voltage for Logic “1.”
Input current of the digital input.
Positive supply current.
Table I. Truth Table
ADG751 IN
Switch Condition
0
ON
1
OFF
REV. A
–5–
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