ADG788BCP 데이터 시트보기 (PDF) - Analog Devices

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ADG788BCP

2.5 Ω
, 1.8 V to 5.5 V, ±2.5 V Triple/Quad SPDT Switches in Chip Scale Packages

Analog Devices 

ADG786/ADG788

RS

VS

VIN

VDD

VSS

VDD

VSS

ADG786/

ADG788

S

D

EN*

GND

VOUT

CL

1nF

3V

LOGIC

INPUT (VIN)

0V

VOUT

QINJ = CL ؋ VOUT

VOUT

* IN1–4 for ADG734

Test Circuit 7. Charge Injection

VDD

0.1␮F

VSS

0.1␮F

IN

VIN

VDD

VSS

S

D

GND

50⍀

NETWORK

ANALYZER

50⍀

VS

RL VOUT

50⍀

VOUT

OFF ISOLATION = 20 LOG VS

Test Circuit 8. OFF Isolation

NETWORK

ANALYZER

VOUT

RL

50⍀

50⍀

VS

VDD

0.1␮F

VSS

0.1␮F

VDD

VSS

SA

SB

IN

D

R

50⍀

GND

CHANNEL-TO-CHANNEL

CROSSTALK

=

20 LOG

VOUT

VS

Test Circuit 9. Channel-to-Channel Crosstalk

VDD

0.1␮F

VSS

0.1␮F

VDD

VSS

IN

VIN

S

D

GND

NETWORK

ANALYZER

50⍀

VS

RL VOUT

50⍀

INSERTION LOSS = 20 LOG VOUT WITH SWITCH

VOUT WITHOUT SWITCH

Test Circuit 10. Bandwidth

Power Supply Sequencing

When using CMOS devices, care must be taken to ensure cor-

rect power supply sequencing. Incorrect sequencing can result

in the device being subjected to stresses beyond those maximum

ratings listed in the data sheet. Digital and analog inputs should

be applied to the device after supplies and ground. In dual sup-

ply applications, if digital and analog inputs may be applied

prior to VDD and VSS supplies, the addition of a Schottky diode

connected between VSS and GND will ensure that the device

powers on correctly. For single supply applications, VSS should

be tied to GND as close to the device as possible.

–10–

REV. 0

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