ADUC814ARU(Rev0) 데이터 시트보기 (PDF) - Analog Devices
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ADUC814ARU
(Rev.:Rev0)
(Rev.:Rev0)
Analog Devices
ADUC814ARU Datasheet PDF : 16 Pages
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Parameter
DAC CHANNEL SPECIFICATIONS
DC ACCURACY9
Resolution
Relative Accuracy
Differential Nonlinearity10
Offset Error
Gain Error
Gain Error Mismatch
ANALOG OUTPUTS
Voltage Range_0
Voltage Range_1
Output Impedance
ISINK
DAC AC SPECIFICATIONS
Voltage Output Settling Time
VDD = 5 V
12
±3
–1
± 1/2
± 50
±1
±1
0.5
0 to VREF
0 to VDD
0.5
50
15
Digital-to-Analog Glitch Energy
REFERENCE INPUT/OUTPUT
REFERENCE OUTPUT11
Output Voltage (VREF)
Accuracy
Power Supply Rejection
Reference Temperature Coefficient
Internal VREF Power-On Time
EXTERNAL REFERENCE INPUT12
Voltage Range (VREF)13
Input Impedance
Input Leakage
POWER SUPPLY MONITOR (PSM)
VDD Trip Point Selection Range
VDD Power Supply Trip Point Accuracy
WATCHDOG TIMER (WDT)13
Time-Out Period
10
2.5
± 2.5
47
± 100
80
0.1
VDD
20
10
2.63
2.93
3.08
4.63
± 3.5
0
2000
LOGIC INPUTS13
All Inputs Except SCLOCK, RESET,
and XTAL1
VINL, Input Low Voltage
0.8
VINH, Input High Voltage
2.0
VDD = 3 V
12
±3
–1
± 1/2
± 50
±1
±1
0.5
0 to VREF
0 to VDD
0.5
50
15
10
Unit
Bits
LSB typ
LSB max
LSB typ
mV max
% max
% typ
% typ
V
V
Ω typ
µA typ
µs typ
nVs typ
ADuC814
Test Conditions
DAC Load to AGND
RL = 10 kΩ, CL = 100 pF
Guaranteed Monotonic
VREF Range
VREF Range
AVDD Range
Of Full Scale on DAC1
DAC VREF = 2.5 V
DAC VREF = VDD
Full-Scale Settling Time to
within 1/2 LSB of Final
Value
1 LSB Change at Major Carry
2.5
± 2.5
57
± 100
80
0.1
VDD
20
10
2.63
2.93
3.08
4.63
± 3.5
0
2000
V
% max
dB typ
ppm/ºC typ
ms typ
Of VREF Measured at the
CREF Pin
V min
V max
kΩ typ
µA max
Internal Band Gap Deselected
via ADCCON2.6
V
V
V
V
% max
Four Trip Points Selectable
in this Range Programmed
via TP1-0 in PSMCON
ms min
ms max
Nine Time-Out Periods
Selectable in this Range
Programmed via PRE3-0 in
WDCON
0.4
V max
2.0
V min
REV. 0
–3–
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