ADUC814ARU(Rev0) 데이터 시트보기 (PDF) - Analog Devices

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ADUC814ARU
(Rev.:Rev0)

MicroConverter®, Small Package 12-Bit ADC with Embedded FLASH MCU

Analog Devices 

ADuC814

SPECIFICATIONS (continued)

NOTES

1Temperature range –40ºC to +125ºC.

2ADC linearity is guaranteed when operating in nonpipelined mode, i.e., ADC conversion followed sequentially by a read of the ADC result. ADC linearity is also

guaranteed during normal MicroConverter core operation.

3 ADC LSB size = VREF/2^12, i.e., for 2.5 V, 1 LSB = 610 µV and for External VREF = 1 V, 1 LSB = 244 µV.

4Offset and gain error and offset and gain error match are measured after factory calibration.

5Based on external ADC system components, the user may need to execute a system calibration to remove additional external channel errors and achieve these

specifications.

6SNR calculation includes distortion and noise components.

7Channel-to-channel crosstalk is measured on adjacent channels.

8The temperature monitor will give a measure of the die temperature directly; air temperature can be inferred from this result.

9DAC linearity is calculated using:

Reduced Code Range of 48 to 4095, 0 to VREF Range.

Reduced Code Range of 48 to 3950, 0 to VDD Range.

DAC output load = 10 kΩ and 100 pF.

10 DAC differential nonlinearity specified on 0 to VREF and 0 to VDD ranges.

11Power-up time for the internal reference will be determined by the value of the decoupling capacitor chosen for both the VREF and CREF pins.

12When using an external reference device, the internal band gap reference input can be bypassed by setting the ADCCON1.6 bit. In this mode, the VREF and CREF

pins need to be shorted together for correct operation.

13These numbers are not production tested but are guaranteed by design and/or characterization data on production release.

14Pins configured in I2C compatible mode or SPI mode; pins configured as digital inputs during this test.

15These typical specifications assume no loading on the XTAL2 pin. Any additional loading on the XTAL2 pin will increase the power-on times.

16Flash/EE memory reliability characteristics apply to both the Flash/EE program memory and the Flash/EE data memory.

17 Endurance is qualified to 100 Kcycles as per JEDEC STD. 22 method A117 and measured at –40ºC, +25ºC, and +125ºC; typical endurance at +25ºC is 700 Kcycles.

18Retention lifetime equivalent at junction temperature (Tj) = 55ºC as per JEDEC STD. 22 method A117. Retention lifetime based on an activation energy of 0.6e V

will derate with junction temperature.

19Power supply current consumption is measured in normal, idle, and power-down modes under the following conditions:

Normal Mode: Reset and all digital I/O pins = open circuit, core clk changed via CD Bits in PLLCON, and core executing internal software loop.

Idle Mode: Reset and all digital I/O pins = open circuit, core clk changed via CD Bits in PLLCON, PCON.0 = 1, and core execution suspended in idle mode.

Power-Down Mode: Reset and all other digital I/O pins = open circuit, core clk changed via CD Bits in PLLCON, PCON.1 = 1, core execution suspended in

Power-Down Mode, and OSC turned ON or OFF via OSC_PD Bit (PLLCON.7) in PLLCON SFR.

20 DVDD power supply current will increase typically by 3 mA (3 V operation) and 10 mA (5 V operation) during a Flash/EE memory program or erase cycle.

Specifications subject to change without notice.

Purchase of licensed I2C components of Analog Devices or one of its sublicensed associated companies conveys a license for the purchaser under the Phillips I2C

Patent Rights to use the ADuC814 in an I2C system, provided that the system conforms to the I2C standard specifications as defined by Phillips.

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