MTU8B54E 데이터 시트보기 (PDF) - Myson Century Inc

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MTU8B54E

EPROM-Based 8-Bit CMOS Microcontroller

Myson Century Inc 

MYSON

MTU8B54E/55E/56E/57E

TECHNOLOGY

3.1.1 INAR(Indirect Address Register) : R0

R0 is not a physically implemented register. It is used as an indirect addressing pointer. Any instruction

accessing this register can access data pointed by FSR(R4).

3.1.2 Timer0(8-bit real-time clock/timer) : R1

This register increases by an external signal edge applied to T0CKI pin, or by internal instruction cycle. It can

be read or written as any other register.

3.1.3 PC(Program Counter) : R2

This register increases itself every instruction cycle, except the following condition shown in Figure 1:

LCALL, LGOTO : from instruction word

RETIA : from STACK

A10~A0

LCALL

RETIA

FIGURE 1. Program Counter

3.1.4 STATUS(Status Register): The content of R3 is listed in Table 1.

Stack1

Stack2

Stack3

Stack4

TABLE 1. STATUS Register

Bit

Symbol

Carry/borrow bit

Description

ADDWF

0

C

= 1, a carry occurred

SUBWF

= 1, a borrow did not occur

= 0, a carry did not occur

Half carry/half borrow bit

= 0, a borrow occurred

ADDWF

= 1, a carry from the 4th low order bit of the result occurred

1

DC = 0, a carry from the 4th low order bit of the result did not occur

SUBWF

= 1, a borrow from the 4th low order bit of the result did not occur

= 0, a borrow from the 4th low order bit of the result occurred

Zero bit:

2

Z

= 1, the result of a logic operation is zero

= 0, the result of a logic operation is not zero

Power down flag bit:

3

PD = 1, after power-up or by the CLRWDT instruction

= 0, by the SLEEP instruction

Time overflow flag bit:

4

TO = 1, after power-up or by the CLRWDT or SLEEP instruction

5, 6, 7

= 0, a WDT time-overflow occurred

-

Unused

Revision 1.2

-4-

24 October 2000

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