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CXA3010Q 데이터 시트보기 (PDF) - Sony Semiconductor

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CXA3010Q Datasheet PDF : 26 Pages
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CXA3010Q
Pin Description
Pin
No.
Symbol
Pin
voltage
1
POWER
ON
Equivalent circuit
VCC
100k
1
A.GND
VCC
Description
Reduced voltage detection output.
This is an open collector pin that outputs a
low signal when VCC is below the specified
value.
2 XWD
1k
2
2.3V
Write data input.
This pin is a Schmitt-type input that is
triggered when the logical voltage goes from
High to Low.
140
3 RD
4 XCI
5 XWG
6 XEG
7 XS1
8 OTF
4
100k
5
1k
6
7
8
9
9 XHD
A.GND
VCC
Read data output.
3
This pin is active when the logical voltage of
the write gate signal and the erase gate
signal is High.
D.GND
Write current control. The write current
increases when the logical voltage is Low.
Write gate signal input. The write system
becomes active when the logical voltage is
Low.
Erase gate signal input. The erase system
VCC becomes active when the logical voltage is
Low.
2.1V
A.GND
Head side switching signal input. The
HEAD1 system is active when the logical
voltage is Low, and the HEAD0 system is
active when the logical voltage is High, but
only when the logical voltage for the write
gate and the erase gate is High.
Filter inner track/outer track mode control.
Inner track mode is selected when the
logical voltage is Low.
Filter, time domain filter and write current
1M/2M mode control. 2M mode is selected
when the logical voltage is Low.
–3–

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