HFBR-5301 데이터 시트보기 (PDF) - HP => Agilent Technologies

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HFBR-5301

Fibre Channel 133 MBd and 266 MBd Transceivers in Low Cost 1x9 Package Style

HP => Agilent Technologies 

power budget to do this. This is may be induced by electrostatic These transceivers are compat-

primarily caused by a change of discharge (ESD). These trans-

ible with industry standard wave

receiver sensitivity.

ceivers are certified as MIL-STD- and hand solder processes.

883C Method 3015.4 Class 2

These transceivers can also be

devices.

Shipping Container

used for applications which

The transceiver is packaged in a

require different Bit Error Rate

(BER) performance. Figure 5

illustrates the typical trade-off

Care should be used to avoid

shorting the receiver data or

signal detect outputs directly to

shipping container designed to

protect it from mechanical and

ESD damage during shipment or

between link BER and the

ground.

storage.

receivers input optical power

level.

Solder and Wash Process

Compatibility

Board Layout – Decoupling

Circuit and Ground Planes

Transceiver Jitter

The transceivers are delivered

You should take care in the layout

Performance

with a protective process plug

of your circuit board to achieve

The Hewlett-Packard 1300 nm

inserted into the duplex SC

optimum performance from these

transceivers are designed to

connector receptacle. This

transceivers. Figure 6 provides a

operate per the system jitter

process plug protects the optical good example of a schematic for

allocations stated in FC-PH

subassemblies during wave solder a power supply decoupling circuit

,
, Annex A.4.3 and A.4.4.

The HP 1300 nm transmitters will

tolerate the worst case input

electrical jitter allowed, without

violating the worst case output

optical jitter requirements.

and aqueous wash processing and

acts as a dust cover during

shipping.

that works well with these parts.

Hewlett-Packard further recom-

mends that a contiguous ground

NO INTERNAL CONNECTION

NO INTERNAL CONNECTION

The HP 1300 nm receivers will

tolerate the worst case input

optical jitter allowed without

violating the worst case output

electrical jitter allowed.

The jitter specifications stated in

the following tables are derived

from the values in FC-PH Annex

HFBR-530X

TOP VIEW

Rx

Rx Tx

Tx

VEE RD

RD

SD VCC VCC TD

TD VEE

1

2

3

4

5

6

7

8

9

C1

C2

A.4.3 and A.4.4. They represent

the worst case jitter contribution

that the transceivers are allowed

to make to the overall system

jitter without violating the

allowed allocation. In practice,

the typical contribution of the HP

transceivers is below these

maximum allowed amounts.

VCC

L1 L2

R2 R3

TERMINATION


,,
,

,
 AT PHY

DEVICE

INPUTS

VCC

R5

R7

C6

R6

R8

C3

C4

VCC FILTER

AT VCC PINS

TRANSCEIVER

R9

R10

R1

R4

C5

TERMINATION

AT TRANSCEIVER

INPUTS

RD RD SD

VCC

TD

TD

Recommended Handling

Precautions

Hewlett-Packard recommends

that normal static precautions be

taken in handling and assembly

of these transceivers to prevent

NOTES:

THE SPLIT-LOAD TERMINATIONS FOR ECL SIGNALS NEED TO BE LOCATED AT THE INPUT

OF DEVICES RECEIVING THOSE ECL SIGNALS. RECOMMEND 4-LAYER PRINTED CIRCUIT

BOARD WITH 50 OHM MICROSTRIP SIGNAL PATHS BE USED.

R1 = R4 = R6 = R8 = R10 = 130 ohms.

R2 = R3 = R5 = R7 = R9 = 82 ohms.

C1 = C2 = C3 = C5 = C6 = 0.1 µF.

C4 = 10 µF.

L1 = L2 = 1 µH COIL OR FERRITE INDUCTOR.

damage and/or degradation which Figure 6. Recommended Decoupling and Termination Circuits.

218

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