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F25L004A-50DG 데이터 시트보기 (PDF) - [Elite Semiconductor Memory Technology Inc.

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F25L004A-50DG
ESMT
[Elite Semiconductor Memory Technology Inc. ESMT
F25L004A-50DG Datasheet PDF : 30 Pages
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ESMT
F25L004A
Byte-Program
The Byte-Program instruction programs the bits in the selected
byte to the desired data. The selected byte must be in the erased
state (FFH) when initiating a Program operation. A Byte-Program
instruction applied to a protected memory area will be ignored.
Prior to any Write operation, the Write-Enable (WREN)
instruction must be executed. CE must remain active low for
the duration of the Byte-Program instruction. The Byte-Program
instruction is initiated by executing an 8-bit command, 02H,
followed by address bits [A23-A0]. Following the address, the data
is input in order from MSB (bit 7) to LSB (bit 0). CE must be
driven high before the instruction is executed. The user may poll
the Busy bit in the software status register or wait TBP for the
completion of the internal self-timed Byte-Program operation.
See Figure 4 for the Byte-Program sequence.
CE
MODE3
SCK MODE0
0 12 3 45 67 8
15 16 23 24 31 32 39
SI
02
ADD.
ADD.
ADD.
DIN
MSB
MSB
MSB LSB
HIGH IMPENANCE
SO
Figure 4 : BYTE-PROGRAM SEQUENCE
Elite Semiconductor Memory Technology Inc.
Publication Date: Jan. 2009
Revision: 1.6
10/30

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