F25L32PA-100PAG 데이터 시트보기 (PDF) - [Elite Semiconductor Memory Technology Inc.

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F25L32PA-100PAG

3V Only 32 Mbit SerialFlash Memory with Dual

[Elite Semiconductor Memory Technology Inc. 

ESMT

F25L32PA

64K Byte Block Erase

The 64K-byte Block Erase instruction clears all bits in the

selected block to FFH. A Block Erase instruction applied to a

protected memory area will be ignored. Prior to any Write

operation, the Write Enable (WREN) instruction must be

executed. CE must remain active low for the duration of the any

command sequence. The Block Erase instruction is initiated by

executing an 8-bit command, D8H, followed by address bits [A23

-A0]. Address bits [AMS -A16] (AMS = Most Significant address) are

used to determine the block address (BAX), remaining address

bits can be VIL or VIH. CE must be driven high before the

instruction is executed. The user may poll the BUSY bit in the

Software Status Register or wait TBE for the completion of the

internal self-timed Block Erase cycle. See Figure 17 for the Block

Erase sequence.

Figure 17: 64K-byte Block Erase Sequence

4K Byte Sector Erase

The Sector Erase instruction clears all bits in the selected sector

to FFH. A Sector Erase instruction applied to a protected memory

area will be ignored. Prior to any Write operation, the Write

Enable (WREN) instruction must be executed. CE must remain

active low for the duration of the any command sequence. The

Sector Erase instruction is initiated by executing an 8-bit

command, 20H, followed by address bits [A23 -A0]. Address bits

[AMS -A12] (AMS = Most Significant address) are used to determine

the sector address (SAX), remaining address bits can be VIL or

VIH. CE must be driven high before the instruction is executed.

The user may poll the BUSY bit in the Software Status Register

or wait TSE for the completion of the internal self-timed Sector

Erase cycle. See Figure 18 for the Sector Erase sequence.

CE

MODE3

SCK MODE0

012345678

15 16 23 24

31

SI

20

ADD.

ADD.

ADD.

MSB

MSB

HIGH IMPENANCE

SO

Figure 18: 4K-byte Sector Erase Sequence

Elite Semiconductor Memory Technology Inc.

Publication Date: Mar. 2009

Revision: 1.0

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