GDM2004D 데이터 시트보기 (PDF) - Unspecified
부품명
상세내역
제조사
GDM2004D Datasheet PDF : 9 Pages
| |||
GDM2004D-FL-YBW
Instruction description
Outline
To overcome the speed difference between the internal clock of KS0066U and the MPU clock, KS0066U performs
internal operations by storing control in formations to IR or DR. The internal operation is determined according to the
signal from MPU, composed of read/write and data bus (Refer to Table7).
Instructions can be divided largely into four groups:
1) KS0066U function set instructions (set display methods, set data length, etc.)
2) Address set instructions to internal RAM
3) Data transfer instructions with internal RAM
4) Others
The address of the internal RAM is automatically increased or decreased by 1.
Note: during internal operation, busy flag (DB7) is read “High”.
Busy flag check must be preceded by the next instruction.
When an MPU program with checking the busy flag (DB7) is made, it must be necessary 1/2 fuss for executing
the next instruction by the falling edge of the “E” signal after the busy flag (DB7) goes to “LOW”.
Contents
1) Clear display
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
0
0
0
0
0
0
0
0
1
Clear all the display data by writing “20H” (space code) to all DDRAM address, and set DDRAM address to “00H” into
AC (address counter).
Return cursor to the original status, namely, brings the cursor to the left edge on the fist line of the display.
Make the entry mode increment (I/D=“High”).
2) Return home
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
0
0
0
0
0
0
0
0
Return home is cursor return home instruction.
Set DDRAM address to “00H” into the address counter.
Return cursor to its original site and return display to its original status, if shifted.
Contents of DDRAM does not change.
3) Entry mode set
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
0
0
0
0
0
0
0
0
Set the moving direction of cursor and display.
I/D: increment / decrement of DDRAM address (cursor or blink)
When I/D=“high”, cursor/blink moves to right and DDRAM address is increased by 1.
When I/D=“Low”, cursor/blink moves to left and DDRAM address is increased by 1.
*CGRAM operates the same way as DDRAM, when reading from or writing to CGRAM.
(I/D=“high”. shift left, I/D=“Low”. Shift right).
4) Display ON/OFF control
RS
0
VER 1.0
R/W
DB7
DB6
DB5
DB4
DB3
DB2
0
0
0
0
0
1
D
5/9
DB1
DB0
1
-
DB1
DB0
I/D
SH
DB1
DB0
C
B
2003/12/09
Share Link: 