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LC662508A 데이터 시트보기 (PDF) - SANYO -> Panasonic

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LC662508A Datasheet PDF : 17 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LC662508A, 662512A, 662516A
Continued from preceding page.
Pin
P50
P51
P52
P53/INT2
I/O
Overview
Output driver type
Options
I/O ports P50 to P53
Input or output in 4-bit or 1-bit units
I/O
Input or output in 8-bit units when used
in conjunction with P40 to P43.
Can be used for output of 8-bit ROM
data when used in conjunction with
P40 to P43.
Pch: Pull-up MOS type
Nch: Intermediate sink current
type
Pull-up MOS or
Nch OD output
Output level on
reset
P53 is also used as the INT2 interrupt
request.
State after a Standby mode
reset
operation
High or low
(option)
Hold mode:
Output off
Halt mode:
Output
retained
I/O ports P60 to P63
P60/SI1/ML
P61/S01/
P62/
SCK1/DT/
P63/PIN1
I/O
Input or output in 4-bit or 1-bit units
P60 is also used as the SI1 serial input
pin and as the ML melody output pin.
P61 is also used as the SO1 serial
output pin.
P62 is also used as the SCK1 serial
clock pin and the DT dial tone output
pin.
P63 is also used for the event count
Pch: CMOS type
Nch: Intermediate sink current
type
Nch: +15V handling when OD
option selected (P61 and P63
only)
CMOS or Nch OD
output
(When the ML or DT
output is used,
select open-drain
output and provide
an external pull-up
resistor.)
H
Hold mode:
Output off
Halt mode:
Output
retained
input to timer 1.
P70
Output ports P70 to P73
P71
P72
O Output in either 1-bit or 4-bit units.
The contents of the output latch are
P73
input by input instruction.
P80
Output ports P80 to P83
P81
P82
O Output in either 1-bit or 4-bit units.
The contents of the output latch are
P83
input by input instruction.
P90
P91
I/O ports P90 to 93.
P92
I/O Input or output in either 1-bit or 4-bit
P93
units.
PA0
Output ports PA0 to PA3
PA1
PA2
O Output in either 1-bit or 4-bit units.
The contents of the output latch are
PA3
input by input instruction.
PB0
Output ports PB0 to PB3
PB1
PB2
O Output in either 1-bit or 4-bit units.
The contents of the output latch are
PB3
input by input instruction.
PC0
PC1
PC2/INV2I
PC3/INV2O
I/O ports PC0 to PC3
I/O Output in either 1-bit or 4-bit units.
Dedicated input ports PC2 to PC3
Dedicated inverter circuits (option)
Pch: Pu MOS
Nch: Intermediate sink current
type
Pull-up MOS or Nch
OD output
Hold mode:
Output off
H
Halt mode:
Output
retained
Pch: Pu MOS
Nch: Intermediate sink current
type
CMOS or Pch OD
output
Output level on
reset
High or low
(option)
Hold mode:
Output off
Halt mode:
Output
retained
Pch: CMOS
Nch: Intermediate sink current
type
CMOS or Nch OD
output
Hold mode:
Output off
H
Halt mode:
Output
retained
Pch: Pu MOS
Nch: +15-V handling when
OD option selected
Pull-up MOS or Nch
OD output
Pch: Pull-up MOS
Nch: Intermediate sink current
type
Pull-up MOS or Nch
OD output
Hold mode:
Output off
H
Halt mode:
Output
retained
Hold mode:
Output off
H
Halt mode:
Output
retained
Pch: CMOS
Nch: Intermediate sink current
type
CMOS or Nch OD
output
Inverter circuit
High or
inverter I/O
(option)
Hold mode:
Port output
off
Inverter
output off
Halt mode:
Port output
retained
Inverter
output
retained
Continued on next page.
No. 5997-6/17

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