LC662508A 데이터 시트보기 (PDF) - SANYO -> Panasonic
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LC662508A
SANYO -> Panasonic
LC662508A Datasheet PDF : 17 Pages
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LC662508A, 662512A, 662516A
Continued from preceding page.
Pin
I/O
Overview
PD0/INV3I
PD1/INV3O
PD2/INV4I
PD3/INV4O
I
Dedicated input ports PD0 to PD3
Dedicated inverter circuits (option)
Output driver type
Options
• When the inverter circuit
option is selected.
• Pch: CMOS type
• Nch: Intermediate sink current
type
Inverter circuits
PE0
PE1
I Dedicated input ports
OSC1
OSC2
I System clock oscillator connections
When an external clock is used, leave
O OSC2 open and connect the clock signal
to OSC1.
RES
System reset input
I
When the P33/HOLD pin is at the high
level, a low level input to the RES pin will
initialize the CPU.
TEST
CPU test pin
I This pin must be connected to VSS
during normal operation.
VDD
VSS
Power supply pins
Note: Pull-up MOS type: The output circuit includes a MOS transistor that pulls the pin up to VDD.
CMOS output: Complementary output.
OD output: Open-drain output
User Options
Ceramic oscillator
or external clock
selection
State after a Standby mode
reset
operation
Normal
input or
inverter I/O
(option)
Option
selection
Inverter
• Hold
mode:
output off
• Halt mode:
output
continues
Hold mode:
input
disabled
Halt mode:
input
enabled
Hold mode:
Oscillator
stops
Halt mode:
Oscillator
continues
1. Ports 0, 1, 4, 5, and 8 output level at reset option
The output levels at reset for I/O ports 0, 1, 4, 5, and 8 in independent 4-bit groups, can be selected from the
following two options.
Option
Output high at reset
Output low at reset
Conditions and notes
The four bits of ports 0, 1, 4, 5, or 8 are set in a group
The four bits of ports 0, 1, 4, 5, or 8 are set in a group
2. Oscillator circuit options
• Main clock
Option
Circuit
Conditions and notes
External clock
OSC1
The input has Schmitt characteristics
Ceramic oscillator
C1 OSC1
Ceramic oscillator
C2
OSC2
Note: There is no RC oscillator option.
No. 5997-7/17
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