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H11B815.W 데이터 시트보기 (PDF) - Fairchild Semiconductor

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H11B815.W
Fairchild
Fairchild Semiconductor Fairchild
H11B815.W Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Package Dimensions (Through Hole) Package Dimensions (0.4" Lead Spacing)
0.270 (6.86)
0.250 (6.35)
0.270 (6.86)
0.250 (6.35)
0.190 (4.83)
0.175 (4.45)
0.200 (5.08)
0.115 (2.92)
0.270 (6.86)
0.250 (6.35)
0.154 (3.90)
0.120 (3.05)
0.100 (2.54)
TYP
0.020 (0.51)
MIN
15°
0.300 (7.62)
typ
0.190 (4.83)
0.175 (4.45)
0.200 (5.08)
0.115 (2.92)
0.270 (6.86)
0.250 (6.35)
0.016 (0.40)
0.008 (0.20)
0.154 (3.90)
0.120 (3.05)
0.004 (0.10)
MIN
0.100 (2.54)
TYP
0.400 (10.16)
TYP
0 to 15°
0.016 (0.40)
0.008 (0.20)
Package Dimensions (Surface Mount)
PCB Footprint Layout
0.270 (6.86)
0.250 (6.35)
0.190 (4.83)
0.175 (4.45)
0.300 (7.62)
TYP
0.200 (5.08)
0.115 (2.92)
0.070 (1.78)
0.045 (1.14)
0.020 (0.51)
MIN
0.100 (2.54)
TYP
0.022 (0.56)
0.016 (0.41)
Lead Coplanarity 0.004 (0.10) MAX
0.315 (8.00)
MIN
0.405 (10.30)
MAX
NOTE
All dimensions are in inches (millimeters)
0.016 (0.40)
0.008 (0.20)
0.295 (7.49)
0.415 (10.54)
0.070 (1.78)
0.060 (1.52)
0.100 (2.54)
0.030 (0.76)
6
www.fairchildsemi.com
H11B815 Rev. 1.0.1

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