HMS97C8032 데이터 시트보기 (PDF) - Hynix Semiconductor
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HMS97C8032 Datasheet PDF : 157 Pages
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HMS91C8032/97C8032
Data memory consists of 7 pages, and each page can store
128bytes. According to the value of RDPG(FCH) and WR-
PG(FDH), HMS9XC8032 selects working memory page. Figure
2-4 shows the generation method of internal data memory ad-
dress. For example, to read from data memory, HMS9XC8032
references the content of RDPG, generates 10bits address and ac-
cesses the corresponding data. The following two cases are
equivalent.
MOV 00H, A 1)
MOV R0, A 2)
RDPG [2 : 0]
3
Implied address of instruction
7
RAM Read Address
10
FFH
No Bit-Addressable Spaces
WRPG [2 : 0]
3
Implied address of instruction
7
RAM Write Address
10
Figure 2-4 Data Memory Address Generation Method
80H
Figure 2-5 Upper 128bytes of Internal RAM
7FH
7FH
Bank
Select
Bits
in PSW
2FH
20H
11
1FH
18H
10
17H
10H
0FH
01
08H
07H
0
Page 0
Bit-Addressable
Space
(Bit Addresses 0-7F)
4 Banks of
8 Registers
R0-R7
Reset Value of
Stack Pointer
Bank
Select
Bits
in PSW
2FH
20H
11
1FH
18H
10
17H
10H
01
0FH
08H
07H
0
Page 6
Bit-Addressable
Space
(Bit Addresses 0-7F)
4 Banks of
8 Registers
R0-R7
Reset Value of
Stack Pointer
Figure 2-6 Page0 ~ Page6 of Internal RAM
2.3 Special Function Register
Unlike Intel 805X series, HMS9XC8032 has two SFR pages. If
the content of SFRPG (address:FFH) is clear to 00H(01H),
HMS9XC8032 assumes working SFR page to SFR page 0(1).
Byte-addressing only registers in SFR pages have the same ad-
dress in each SFR pages, but bit addressing registers in SFR page
0 and SFR page 1 are different except ACC, B and PSW.
The Port Data registers are located to SFR page1, and the Periph-
eral Control registers to SFR page0. Refer to "4.2 Special Func-
tion Registers" on page 19.
NOV., 2001 Ver 1.02
7
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