HYB314175BJ-50- 데이터 시트보기 (PDF) - Siemens AG

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HYB314175BJ-50-

3.3V 256 K x 16-Bit EDO-DRAM 3.3V 256 K x 16-Bit EDO-DRAM (Low power version with Self Refresh)

Siemens AG 

HYB 314175BJ/BJL-50/-55/-60

3.3V 256K x 16 EDO-DRAM

AC Characteristics 5) 6)

TA = 0 to 70 °C; VSS = 0 V; VCC = 3.3 V ± 0.3 V, tT = 2 ns

Parameter

Symbol

Limit Values

Unit Note

-50

-55

-60

min max min max min max

Common Parameters

Random read or write cycle time tRC

RAS precharge time

tRP

RAS pulse width

tRAS

CAS pulse width

tCAS

Row address setup time

tASR

Row address hold time

tRAH

Column address setup time

tASC

Column address hold time

tCAH

RAS to CAS delaytime

tRCD

RAS to column address delay time tRAD

RAS hold time

tRSH

CAS hold time

tCSH

CAS to RAS precharge time

tCRP

Transition time(rise and fall)

tT

Refresh period

tREF

Refresh period (L-version)

tREF

Read Cycle

Access time from RAS

tRAC

Access time from CAS

tCAC

Access time from column address tAA

OE access time

tOEA

Column address to RAS lead time tRAL

Read command setup time

tRCS

Read command hold time

tRCH

Read command hold time ref. to

tRRH

RAS

CAS to output inlow-Z

tCLZ

89 – 94 – 104 – ns

35 – 35 – 40 – ns

50 10k 55 10k 60 10k ns

8 10k 8 10k 10 10k ns

0 – 0 – 0 – ns

8 – 8 – 10 – ns

0 – 0 – 0 – ns

8 – 8 – 10 – ns

12 37 12 43 14 45 ns

10 25 10 30 12 30 ns

13 – 13 – 15 – ns

40 – 45 – 50 – ns

5 – 5 – 5 – ns

1 50 1 50 1 50 ns 7

– 16 – 16 – 16 ms

– 128 – 128 – 128 ms

– 50 – 55 – 60 ns 8, 9

– 13 – 13 – 15 ns 8, 9

– 25 – 25 – 30 ns 8,10

– 13 – 13 – 15 ns

25 – 25 – 30 – ns

0 – 0 – 0 – ns

0 – 0 – 0 – ns 11

0 – 0 – 0 – ns 11

0 – 0 – 0 – ns 8

Semiconductor Group

7

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