Q67100-Q2178 데이터 시트보기 (PDF) - Siemens AG

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Q67100-Q2178

3.3V 1M × 64-Bit EDO-DRAM Module 3.3V 1M x 72-Bit EDO-DRAM Module

Siemens AG 

HYM 64(72)V1005GU-50/-60

1M x 64/72 DRAM Module

DC Characteristics (contd’ )

TA = 0 to 70 °C; VCC = 3.3 V ± 0.3 V

Parameter

Symbol

x 64

min. max.

Average VCC supply current:

ICC1

-50 version

-60 version

–

800

–

720

x 72

min. max.

–

940

–

840

Unit Note

s

mA 2) 3)

mA 4)

(RAS,CAS,address cycling, tRC=tRC min.)

Standby VCC supply current

ICC2

(RAS = CAS = VIH, one address change)

Average VCC supply current during RAS ICC3

only refresh cycles:

-50 version

-60 version

–

16

–

18 mA –

2) 4)

–

800

–

940 mA

–

720

–

840 mA

(RAS cycling, CAS = VIH , tRC = tRC min.)

Average VCC supply current during

ICC4

hyper page mode (EDO):

-50 version

-60 version

–

360

–

500 mA 2) 3)

–

300

–

420 mA 4)

(RAS = VIL, CAS, address cycling

tPC = tPC min.)

Standby VCC supply current

ICC5

(RAS = CAS = VCC – 0.2 V, one address

change)

Average VCC supply current during

ICC6

CAS-before-RAS refresh mode:

-50 version

-60 version

–

8

–

9 mA –

–

800

–

940 mA 2) 4)

–

720

–

840 mA

(RAS, CAS cycling, tRC = tRC min.)

Semiconductor Group

8

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