STLC5048 데이터 시트보기 (PDF) - STMicroelectronics
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STLC5048 Datasheet PDF : 45 Pages
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STLC5048
PIN DESCRIPTION (continued)
ANALOG PIN DESCRIPTION
No.
Name
Type
33
VFRO0
AO
39
VFRO1
AO
42
VFRO2
AO
48
VFRO3
AO
35
VFXI0
AI
38
VFXI1
AI
43
VFXI2
AI
46
VFXI3
AI
40
CAP
34
ITH
AO
47
ILIM
AO
49
VBG
AI
NOT CONNECTED
2, 18, 63, 1
N.C.
32, 64
RES
POWER SUPPLY PIN DESCRIPTION
25,36,
37,44,
45,56
VCC0..5
APS
26,30,
31,50,
51,55
VEE0..5
APS
9
VDD
DPS
8
VSS
DPS
41
SUB
DPS
Description
Receive analog amplifier output channel 0. PCM data received on
the programmed Time Slot on DR input is decoded and appears at
this output.
Receive analog amplifier output channel 1. PCM data received on
the programmed Time Slot on DR input is decoded and appears at
this output.
Receive analog amplifier output channel 2. PCM data received on
the programmed Time Slot on DR input is decoded and appears at
this output.
Receive analog amplifier output channel 3. PCM data received on
the programmed Time Slot on DR input is decoded and appears at
this output.
TX Input Amplifier channel 0. Typ 1MΩ input impedance
TX Input Amplifier channel 1. Typ 1MΩ input impedance
TX Input Amplifier channel 2. Typ 1MΩ input impedance
TX Input Amplifier channel 3. Typ 1MΩ input impedance
AGND Voltage filter pin: a 100nF capacitor must be connected
between ground and this pin.
SLIC Off Hook detection threshold.
SLIC line current limitation.
SLIC VBG reference for DC characterisrics programmability.
Not Connected, must be left open
Reserved pins, must be connected to ground
Total 6 pins: 3.3V analog power supplies, should be shorted together,
require 100nF decoupling capacitor to VEE.
Total 6 pins: analog ground, should be shorted together.
Digital Power supply 3.3V, require 100nF decoupling capacitor to
VSS.
Digital Ground.
Substrate connection. Must be shorted together with VEE and VSS
pins.
4/45
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