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M65665CFP 데이터 시트보기 (PDF) - Renesas Electronics

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M65665CFP
Renesas
Renesas Electronics Renesas
M65665CFP Datasheet PDF : 18 Pages
First Prev 11 12 13 14 15 16 17 18
M65665CFP/SP
Address
10h
Bit
<7:6>
<5:4>
Symbol
NO_BST_LVL<1:0>
BW_DET_LVL<1:0>
<3:0>
11h
<7>
<6:0> HYA<6:0>
12h
<7:0> VYA<7:0>
13h
<7:2> HX<5:0>
<1:0> HP<1:0>
14h
<7:6> MVC<1:0>
<5:0> VXS<5:0>
15h
<7>
<6> PLUS
<5>
<4:0> LINE_NUM<4:0>
16h
<7:0> STB_DLY<7:0>
17h
<7:0> L_LEVEL<7:0>
18h
<7> EDGE_ON
<6:4> BGBY_EDGE<2:0>
<3:0> BGY_EDGE<3:0>
19h
<7:5> BGRY_EDGE<2:0>
<4> HPFOFF
<3:0> FREE_RUN_ADJ<3:0>
1Ah
<7:0>
1Bh
<7:6> EXPORT<1:0>
<5> INV_UV
<4> AFC_OFF
<3:0>
1Ch
<7> PINOE
<6:0> V_DAC<6:0>
1Dh
<7:0> PINOE<7:0>
1Eh
<7:0>
Read/
Write
W/R
W/R
Reset
Value
0
0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
W/R 0
1/9 Ref.
Value
0
0
0
0
37h
44h
1Eh
0
0
29h
0
0
0
11h
40h
82h
1h
0
Ch
0
0
0
0
0
0
0
0
0
32h
E6h
0
Remarks
For test
BW det. threshold setting : [0] off , [1] 16mV , [2] 32mV ,
[3] 64mV
For test
For test : 0 set only
Sub picture horizontal display pixel
Sub picture vertical display line number
Sub picture horizontal capture position (coarse)
Sub picture horizontal capture position (fine)
Sub picture c-sync input mask period :
[0] 48usec , [1] 44usec , [2] 53usec , [3] off
Sub picture sample start line
For test : 0 set only
For test : 0 set only
For test : 0 set only
Data slicer line selection
Data slicer start bit detection parameter
Data slicer data slice parameter
Frame data independent control : [0] disable , [1] enable
Frame data independent B-Y data setting
Frame data independent Y data setting
Frame data independent R-Y data setting
Sub picture Y output HPF : [0] on , [1] off
Frequency adjustment control when free run mode (2's
comp)
For test
Ext. port (7 pin) : [0] "0" output , [1] "1" output , [2 or 3]
Sub BGP
Invert U,V output value : [0] normal , [1] invert
Sub picture AFC : [0] on , [1] off
For test
For test
Sub picture V or B DAC output amplitude control
For test
For test : 0 set only
Rev.2.00, Sep.04.2003, page 11 of 17

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