MCP6S26T(2012) 데이터 시트보기 (PDF) - Microchip Technology

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MCP6S26T
(Rev.:2012)

Single-Ended, Rail-to-Rail I/O, Low Gain PGA

Microchip Technology 

MCP6S21/2/6/8

1.0 ELECTRICAL

CHARACTERISTICS

Absolute Maximum Ratings †

VDD - VSS .........................................................................7.0V

All inputs and outputs ....................... VSS - 0.3V to VDD +0.3V

Difference Input voltage ........................................ |VDD - VSS|

Output Short Circuit Current...................................continuous

Current at Input Pin 2 mA

Current at Output and Supply Pins  30 mA

Storage temperature .....................................-65°C to +150°C

Junction temperature .................................................. +150°C

ESD protection on all pins (HBM;MM) 2 kV; 200V

† Notice: Stresses above those listed under "Maximum

Ratings" may cause permanent damage to the device. This is

a stress rating only and functional operation of the device at

those or any other conditions above those indicated in the

operation listings of this specification is not implied. Exposure

to maximum rating conditions for extended periods may affect

device reliability.

DC CHARACTERISTICS

PIN FUNCTION TABLE

Name

Function

VOUT

CH0-CH7

VSS

VDD

SCK

SI

SO

CS

VREF

Analog Output

Analog Inputs

Negative Power Supply

Positive Power Supply

SPI Clock Input

SPI Serial Data Input

SPI Serial Data Output

SPI Chip Select

External Reference Pin

Electrical Specifications: Unless otherwise indicated, TA = +25°C, VDD = +2.5V to +5.5V, VSS = GND, VREF = VSS, G = +1 V/V,

Input = CH0 = (0.3V)/G, CH1 to CH7 = 0.3V, RL = 10 kto VDD/2, SI and SCK are tied low and CS is tied high.

Parameters

Sym

Min

Typ

Max

Units

Conditions

Amplifier Input

Input Offset Voltage

VOS

-275

—

Input Offset Voltage Drift

VOS/TA

—

±4

Power Supply Rejection Ratio

PSRR

70

85

+275

—

—

µV

µV/°C

dB

G = +1, VDD = 4.0V

TA = -40 to +85°C

G = +1 (Note 1)

Input Bias Current

Input Bias Current over

Temperature

Input Impedance

Input Voltage Range

Amplifier Gain

IB

IB

ZIN

VIVR

—

±1

—

—

—

250

—

1013||15

VSS0.3

—

—

VDD+0.3

pA

pA

||pF

V

CHx = VDD/2

TA = -40 to +85°C,

CHx = VDD/2

Nominal Gains

—

—

1 to 32

—

V/V +1, +2, +4, +5, +8, +10, +16 or +32

DC Gain Error

G = +1

gE

-0.1

G  +2

gE

-1.0

DC Gain Drift

G = +1 G/TA

—

G  +2 G/TA

—

Internal Resistance

RLAD

3.4

Internal Resistance over

Temperature

RLAD/TA —

Amplifier Output

—

—

±0.0002

±0.0004

4.9

+0.028

+0.1

+1.0

—

—

6.4

—

%

%

%/°C

%/°C

k

%/°C

VOUT  0.3V to VDD 0.3V

VOUT  0.3V to VDD 0.3V

TA = -40 to +85°C

TA = -40 to +85°C

(Note 1)

(Note 1)

TA = -40 to +85°C

DC Output Non-linearity G = +1

VONL

—

±0.003

—

% of FSR VOUT = 0.3V to VDD 0.3V, VDD = 5.0V

G  +2

VONL

—

±0.001

—

% of FSR VOUT = 0.3V to VDD 0.3V, VDD = 5.0V

Maximum Output Voltage Swing VOH, VOL VSS+20

—

VDD-100

mV G  +2; 0.5V output overdrive

VSS+60

—

VDD-60

G  +2; 0.5V output overdrive,

VREF = VDD/2

Short-Circuit Current

IO(SC)

—

±30

—

mA

Note 1: RLAD (RF + RG in Figure 4-1) connects VREF, VOUT and the inverting input of the internal amplifier. The MCP6S22 has

VREF tied internally to VSS, so VSS is coupled to the internal amplifier and the PSRR spec describes PSRR+ only. We

recommend the MCP6S22’s VSS pin be tied directly to ground to avoid noise problems.

2: IQ includes current in RLAD (typically 60 µA at VOUT = 0.3V). Both IQ and IQ_SHDN exclude digital switching currents.

3: The output goes Hi-Z and the registers reset to their defaults; see Section 5.4, “Power-On Reset”.

DS21117B-page 2

 2003-2012 Microchip Technology Inc.

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