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MCP6S26T(2012) 데이터 시트보기 (PDF) - Microchip Technology

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MCP6S26T
(Rev.:2012)
Microchip
Microchip Technology Microchip
MCP6S26T Datasheet PDF : 42 Pages
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MCP6S21/2/6/8
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, TA = +25°C, VDD = +2.5V to +5.5V, VSS = GND, VREF = VSS, G = +1 V/V,
Input = CH0 = (0.3V)/G, CH1 to CH7 = 0.3V, RL = 10 kto VDD/2, SI and SCK are tied low and CS is tied high.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Power Supply
Supply Voltage
VDD
2.5
5.5
V
Quiescent Current
IQ
0.5
1.0
1.35
mA IO = 0 (Note 2)
Quiescent Current, Shutdown
IQ_SHDN
0.5
1.0
µA IO = 0 (Note 2)
mode
Power-On Reset
POR Trip Voltage
VPOR
1.2
1.7
2.2
V
(Note 3)
POR Trip Voltage Drift
VPOR/T
-3.0
mV/°C TA = -40°C to+85°C
Note 1: RLAD (RF + RG in Figure 4-1) connects VREF, VOUT and the inverting input of the internal amplifier. The MCP6S22 has
VREF tied internally to VSS, so VSS is coupled to the internal amplifier and the PSRR spec describes PSRR+ only. We
recommend the MCP6S22’s VSS pin be tied directly to ground to avoid noise problems.
2: IQ includes current in RLAD (typically 60 µA at VOUT = 0.3V). Both IQ and IQ_SHDN exclude digital switching currents.
3: The output goes Hi-Z and the registers reset to their defaults; see Section 5.4, “Power-On Reset”.
AC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, TA = +25°C, VDD = +2.5V to +5.5V, VSS = GND, VREF = VSS, G = +1 V/V,
Input = CH0 =(0.3V)/G, CH1 to CH7=0.3V, RL = 10 kto VDD/2, CL = 60 pF, SI and SCK are tied low, and CS is tied high.
Parameters
Sym
Min
Typ
Max Units
Conditions
Frequency Response
-3 dB Bandwidth
BW
Gain Peaking
GPK
Total Harmonic Distortion plus Noise
2 to 12
0
MHz All gains; VOUT < 100 mVP-P (Note 1)
dB All gains; VOUT < 100 mVP-P
f = 1 kHz, G = +1 V/V THD+N
0.0015
% VOUT = 1.5V ± 1.0VPK, VDD = 5.0V,
BW = 22 kHz
f = 1 kHz, G = +4 V/V THD+N
0.0058
% VOUT = 1.5V ± 1.0VPK, VDD = 5.0V,
BW = 22 kHz
f = 1 kHz, G = +16 V/V THD+N
0.023
% VOUT = 1.5V ± 1.0VPK, VDD = 5.0V,
BW = 22 kHz
f = 20 kHz, G = +1 V/V THD+N
0.0035
% VOUT = 1.5V ± 1.0VPK, VDD = 5.0V,
BW = 80 kHz
f = 20 kHz, G = +4 V/V THD+N
0.0093
% VOUT = 1.5V ± 1.0VPK, VDD = 5.0V,
BW = 80 kHz
f = 20 kHz, G = +16 V/V THD+N
0.036
% VOUT = 1.5V ± 1.0VPK, VDD = 5.0V,
BW = 80 kHz
Step Response
Slew Rate
SR
4.0
V/µs G = 1, 2
11
V/µs G = 4, 5, 8, 10
22
V/µs G = 16, 32
Noise
Input Noise Voltage
Eni
3.2
µVP-P f = 0.1 Hz to 10 kHz (Note 2)
26
f = 0.1 Hz to 200 kHz (Note 2)
Input Noise Voltage Density
eni
10
— nV/Hz f = 10 kHz (Note 2)
Input Noise Current Density
ini
4
— fA/Hz f = 10 kHz
Note 1: See Table 4-1 for a list of typical numbers.
2: Eni and eni include ladder resistance noise. See Figure 2-33 for eni vs. G data.
2003-2012 Microchip Technology Inc.
DS21117B-page 3

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