MX29L1611 데이터 시트보기 (PDF) - Macronix International
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MX29L1611 Datasheet PDF : 34 Pages
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MX29L1611G / MX29L1611*
WRITE OPERATIONS
Commands are written to the COMMAND INTERFACE
REGISTER (CIR) using standard microprocessor write
timings. The CIR serves as the interface between the
microprocessor and the internal chip operation. The CIR
can decipher Read Array, Read Silicon ID, Erase and
Program command. In the event of a read command, the
CIR simply points the read path at either the array or the
silicon ID, depending on the specific read command
given. For a program or erase cycle, the CIR informs the
write state machine that a program or erase has been
requested. During a program cycle, the write state
machine will control the program sequences and the CIR
will only respond to status reads. During a sector/chip
erase cycle, the CIR will respond to status reads. After
the write state machine has completed its task, it will
allow the CIR to respond to its full command set. The CIR
stays at read status register mode until the microprocessor
issues another valid command sequence.
Device operations are selected by writing commands into
the CIR. Table 3 below defines 16 Mbit flash family
command.
TABLE 3. COMMAND DEFINITIONS(BYTE/VPP=VHH)
Command
Sequence
Bus Write
Cycles Req'd
First Bus
Addr
Write Cycle
Data
Second Bus
Addr
Write Cycle
Data
Third Bus
Addr
Write Cycle
Data
Fourth Bus
Addr
Read/Write Cycle Data
Fifth Bus
Addr
Write Cycle
Data
Sixth Bus
Addr
Write Cycle
Data
Read/
Reset
4
Silicon
ID Read
4
Page
Program
4
Chip
Erase
6
Sector
Erase
6
Read
Status Reg.
4
5555H
AAH
2AAAH
55H
5555H
F0H
RA
RD
5555H 5555H
AAH
AAH
2AAAH 2AAAH
55H
55H
5555H 5555H
90H
A0H
00H/01H PA
C2H/F6H PD
5555H 5555H
AAH AAH
2AAAH 2AAAH
55H
55H
5555H 5555H
80H
80H
5555H 5555H
AAH AAH
2AAAH 2AAAH
55H
55H
5555H SA
10H
30H
5555H
AAH
2AAAH
55H
5555H
70H
X
SRD
Clear
Status Reg.
3
5555H
AAH
2AAAH
55H
5555H
50H
P/N:PM0604
REV. 0.8, JAN. 24, 2002
6
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