Nexperia
PBSS5350SS
50 V, 2.7 A PNP/PNP low VCEsat (BISS) transistor
103
Zth(j-a)
(K/W)
102
10
1
duty cycle =
1.0
0.75
0.5
0.33
0.2
0.1
0.05
0.02
0.01
0
006aaa810
10−1
10−5
10−4
10−3
10−2
10−1
1
10
102
103
tp (s)
FR4 PCB, mounting pad for collector 1 cm2
Fig 3. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
103
006aaa811
Zth(j-a)
(K/W)
duty cycle =
102
1.0
0.75
0.5
0.33
0.2
10
0.1
0.05
0.02
0.01
0
1
10−4
10−3
10−2
10−1
1
10
102
103
tp (s)
Ceramic PCB, Al2O3, standard footprint
Fig 4. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBSS5350SS_1
Product data sheet
Rev. 01 — 3 April 2007
© Nexperia B.V. 2017. All rights reserved
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