S3C8075 데이터 시트보기 (PDF) - Samsung

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S3C8075

Samsung's SAM87 family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU

Samsung 

S3C8075/P8075

PRODUCT OVERVIEW

Pin

Name

P0.0–P0.7

P1.0–P1.7

P2.0–P2.3

P2.4–P2.7

P3.0–P3.7

P4.0–P4.7

P5.0–P5.7

P6.0–P6.7

RxD

TxD

TA, TB

TCCK, TDCK

INT0–INT3

Pin

Type

I/O

I/O

I/O

I/O

I/O

I/O

O

I/O

I/O

I/O

I/O

I/O

Table 1-2. S3C8075 Pin Descriptions (64-SDIP)

Pin

Description

Circuit

Number

I/O port with nibble-programmable pins;

E

Input or push-pull, open-drain output and

software assignable pull-ups; also

configurable as external interface address

lines A8-A15.

Same general characteristics as port 0; also

E

configurable as external interface

address/data lines AD0–AD7.

I/O port with bit-programmable pins; Input

or push-pull output. Lower nibble pins 0–3

are configurable for external interface

signals; upper nibble pins 4–7 are bit-

programmable for external interrupts INT0–

INT3. P2.4 can also be used for external

WAIT input.

D-1 (lower

nibble);

D-1 (upper

nibble; with

noise filter)

I/O port with bit-programmable pins; Input

D-1

or push-pull output. Alternate functions

include software-selectable UART transmit

and receive on pins 3.7 and 3.6, timer B

and timer A outputs at pins 3.5 and 3.4, and

timer D and C clock inputs at pins 3.1 and

3.0.

I/O port with bit-programmable pins; Input

or push-pull output; software-assignable

pull-ups. Alternate functions include

external interrupt inputs INT4-INT11 (with

interrupt enable and pending control) and

timer C and D gate input at P4.0 and P4.1.

D

(with noise

filter)

I/O port with nibble-programmable pins;

E

Input or push-pull, open-drain output;

software-assignable pull-ups.

Output port with nibble-programmable pins;

E-8

push-pull, open-drain output; software-

assignable pull-ups.

Bi-directional serial data input pin

–

Serial data output pin

–

Timer A and B output pins

4

Timer C and D external clock input pins

D-1

External interrupts. I/O pin 2.4 (share pin

with INT0) is also configurable as a WAIT

signal input pin for the external interface.

D-1

(with noise

filter)

SDIP Pin

Number

1–7, 64

56–63

40–47

24– 31

8–15

21, 22,

50–55

32–39

24

25

27, 26

30, 31

40–43

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Pins

A8–A15

AD0–AD7

AS, DS,

DM, R/W

INT0–INT3,

WAIT

TCCK,

TDCK, TA,

TB, TxD,

RxD

INT4–

INT11,

TCG, TDG

–

–

P3.7

P3.6

P3.4, P3.5

P3.0, P3.1

P2.4–P2.7

1-7

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